N74F166D,602 NXP Semiconductors, N74F166D,602 Datasheet - Page 7

IC SHIFT REGISTER 8BIT 16-SOIC

N74F166D,602

Manufacturer Part Number
N74F166D,602
Description
IC SHIFT REGISTER 8BIT 16-SOIC
Manufacturer
NXP Semiconductors
Series
74Fr
Type
Not Requiredr
Datasheet

Specifications of N74F166D,602

Logic Type
Register, Bidirectional
Output Type
Standard
Number Of Elements
1
Number Of Bits Per Element
8
Function
Universal
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Technology
Bipolar
Number Of Elements
1
Number Of Bits
8
Logic Family
F
Logical Function
Shift Register
Operating Supply Voltage (typ)
5V
Package Type
SOIC W
Propagation Delay Time
12ns
Operating Temp Range
0C to 70C
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3166-5
933802540602
N74F166D
Philips Semiconductors
AC SETUP REQUIREMENTS
AC WAVEFORMS
Waveform 1. Propagation delay for clock input to output,
Feb. 14, 1991
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su
su
h
h
h
h
su
h
su
su
h
h
w
w
w
rec
8-bit bidirectional universal shift register
(H)
(L)
(H)
(L)
(H)
(H)
(L)
(L)
(L)
(L)
(L)
(L)
(H)
(H)
(H)
CP
Q7
clock pulse width, and maximum clock frequency
Setup time, high or low
Dn, Ds to CP, CE
Hold time, high or low
Dn, Ds to CP
Hold time, high or low
Dn, Ds to CE
Setup time, low
CE to CP
Hold time, high
CE to CP
Setup time, high or low
PE to CP, CE
Hold time, high or low
PE to CP
CP pulse width,
high or low
MR pulse width, low
Recovery time
V
t
PHL
M
PARAMETER
t
W
(H)
1/f
V
,
MAX
MR to CP
M
V
M
t
W
(L)
V
t
PLH
M
CONDITION
Waveform 3
Waveform 3
Waveform 3
Waveform 3
Waveform 3
Waveform 3
Waveform 3
Waveform 1
Waveform 2
Waveform 2
TEST
V
M
SF00287
MIN
3.0
2.5
0.0
0.0
1.5
0.0
5.0
0.0
3.0
3.0
0.0
0.0
3.0
4.5
4.0
4.0
T
V
amb
C
R
CC
L
L
7
TYP
= 50pF,
= 500
= +25 C
= +5.0V
Waveform 2. Master reset pulse width, master reset to output
Q7
MR
CP
MAX
V
CC
MIN
delay and master reset to clock recovery time
4.0
3.0
1.0
0.0
2.0
0.0
6.0
0.0
4.0
4.0
0.0
0.0
3.5
5.0
4.0
4.5
T
amb
C
R
= +5.0V
L
L
V
+70 C
t
PHL
= 50pF,
M
= 500
LIMITS
= 0 C to
t
w
(L)
MAX
V
10%
M
V
M
T
t
rec
amb
V
CC
MIN
4.0
3.0
1.0
0.0
2.0
0.0
6.0
0.0
4.0
6.0
0.0
0.0
3.5
6.0
4.0
4.5
= –40 C to +85 C
C
R
= +5.0V
V
L
L
M
= 50pF,
= 500
Product specification
74F166
MAX
10%
SF00288
SF00288
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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