HDSP-420X Agilent(Hewlett-Packard), HDSP-420X Datasheet
HDSP-420X
Related parts for HDSP-420X
HDSP-420X Summary of contents
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Fibre Channel Transmitter and Receiver Chipset Technical Data Features • ANSI X3.230-1994 Fibre Channel Standard Compatible (FC-0) • Selectable 531.25 Mbaud or 1062.5 Mbaud Data Rates • Selectable On Chip Laser Driver and 50 Cable Driver • TTL Compatible I/Os ...
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CLOCK Tx ENCODED DATA ENCODED DATA Rx CLOCK REF CLOCK Figure 1. Point-to-Point Data Link. 10 DATA BYTE 0 TTL INTERFACE Tx [00:09] INPUT LATCH DATA BYTE 1 Tx [10:19] 10 TBC Figure 2. HDMP-1512 (Tx) Block Diagram. Transmitter Operation ...
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When operating in the 531.25 Mbaud mode, data byte 0, Tx[00:09], is active and is clocked into the input latch a single byte (10 bits) on each rising edge of TBC. In the 1062.5 Mbaud mode both data byte 0, ...
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INTERNAL INPUT DATA SELECT STREAM 11 ± MUX V _LZ1 _LZ GND_LZ 26 -LZON 30 LASER ON LZPWRON 36 ERROR FAULT 29 DETECTOR -LZBG CC Figure 3. Laser ...
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LZTC (# 27) will begin to discharge. After approximately 2 msec, the voltage on LZTC falls to the fault value and the error detector will bring the FAULT pin (# 29) high to alert the system. The ...
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Setting pin #32 high disables the equalizer. Setting pin # 32 low enables the equalizer. The typical performance of the input equalizer is shown in the (frequency response) plot of Figure 7. The ...
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EWRAP The table above llustrates these various settings. Normally, the recovered serial clock is used by the clock gener- ator to generate the various internal clocks the receiver uses ...
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Rx Power Supply Supervisor A power supply supervisor feature has been designed into the receiver as a system aid during power-up. The -POR (pin # 27) output is held low until the power supply voltage (V ) crosses the CC ...
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HDMP-1512 (Tx), HDMP-1514 (Rx) Transmitter & Receiver Byte Rate Clock Requirements + 4 5 Symbol f Nominal Frequency F Frequency Tolerance (For Fibre Channel Compliance) tol Symm ...
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HDMP-1512 (Tx), HDMP-1514 (Rx) DC Electrical Specifications + 4 5 Symbol V TTL Input High Voltage Level, Guaranteed high signal for IH,TTL all inputs 100 ...
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HDMP-1512 (Tx) Timing Characteristics + 4 5.5 V, PPSEL = 0, SPDSEL = Symbol t Setup Time s t Hold Time h [1] t_txlat Transmit Lateny Note: ...
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O_TTL V _TTL CC V _LOG CC 800 72 ESD ESD GND_LOG GND_TTL Figure 9. O-TTL and I-TTL Simplified Circuit Schematic. O-BLL V _HS CC V _LOG ESD ESD ESD ESD GND_HS GND_LOG Figure ...
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HDMP-1512 (Tx)Pin Assignments Pin Name Pin 01 CAP1A 21 02 CAP1B 22 03 GND_A 23 04 GND_A VCC_HS1 27 08 +LOUT 28 09 -LOUT 29 10 GND_LZHS ...
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HDMP-1512 (Tx), Signal Definitions Symbol Signal Name CAP0[A:B] Loop Filter Capacitor Pins [79,80] CAP1[A:B] Loop Filter Capacitor Pins [1,2] -COMGEN Comma Generate Pin [32] -ECLKSEL External Clock Select Pin [69] EWRAP Enable Wrap Pin [71] FAULT Laser Fault Indicator Pin ...
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HDMP-1512 (Tx), Signal Definitions (cont’d.) Symbol Signal Name LZPWRON Laser Power On Pin [36] LZTC Laser Timing Cap Pin [27] PPSEL Ping-Pong Select Pin [34] SI Laser External Serial Input Pins [11,12] SO Cable Serial Data Output Pins [5,6] SPDSEL ...
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HDMP-1512 (Tx), Signal Definitions (cont’d.) Symbol Signal Name VCC_LZAC Laser Power Supply Pin [17] VCC_LZBG Laser Power Supply Pins [15] VCC_TTL TTL Power Supply Pins [41,42,63,64] NC Pin [38 ...
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HDMP-1514 (Rx) Pin Assignments Pin Name Pin 01 CAP1A 21 02 CAP1B 22 03 GND_A 23 04 GND_A 24 05 -TCLKSEL 25 06 N_RXTEMP 26 07 CLKIN (TCLK P_RXTEMP 28 09 GND_TTLA 29 10 VCC_TTLA ...
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HDMP-1514 (Rx), Signal Definitions (cont’d.) Symbol Signal Name DR_REF Receiver Reference Pin [21] EN_CDET Enable Comma Detect Pin [38] -EQEN Equalizer Enable Input Input Pin [32] EWRAP Enable Wrap Pin [71] GND_A Analog Ground Pins [3,4] GND_HS High Speed Ground ...
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HDMP-1514 (Rx), Signal Definitions (cont’d.) Symbol Signal Name PPSEL Ping-Pong Select Pin [76] PS_CT Power Supply Timing Cap Pin [22] RBC[0:1] Receive Byte Clocks Pin [67, 69] RX[00:19] Data Outputs Pins [43, 62] SPDSEL Serial Speed Select Pin [71] -TCLKSEL ...
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Package Description and Assembly Recommendations The HDMP-1512 and HDMP- 1514 are available in the industry standard M-Quad 80 lead package. The outline dimensions conform to JEDEC plastic QFP specifications and are shown in Figure 13. The package material is aluminum. ...
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TBC Tx[00:19] DATA Figure 14. HDMP-1512 (Transmitter) Timing Diagram, with PPSEL = 0. COM_DET ...
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TBC Tx[00:09] DATA Tx[10:19] DATA ...
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V 0.1 µ EWRAP TBC 74 ...
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V 0.1 µ EWRAP TBC 74 ...
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V 0.1 µ RBC1 67 68 RBC0 LUNUSE ...
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V 0.1 µ RBC1 67 68 RBC0 ...