AS5215-HQFT-OM AMSCO [austriamicrosystems AG], AS5215-HQFT-OM Datasheet - Page 7

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AS5215-HQFT-OM

Manufacturer Part Number
AS5215-HQFT-OM
Description
Manufacturer
AMSCO [austriamicrosystems AG]
Datasheet
AS5215
Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 6. Electrical System Specifications
6.1 Timing Characteristics
Table 7. Timing Characteristics
Remark: The digital interface will be reset during the low phase of the CS signal.
www.austriamicrosystems.com/AS5215
SF=SF
SF=AP1_
-
1/AP2_1
Symbol
DC
Symbol
AP2_1)
C
(
V
V
AP1_1/
t10_3
t13_3
THD
t1_3
t2_3
t9_3
offset1
offset2
LOAD
SR
t11
t12
t3
t4
t5
t6
t7
t8
offdrift
25C
Chip select to positive edge of DCLK
Chip select to drive bus externally
Setup time command bit
Data valid to positive edge of DCLK
Hold time command bit
Data valid after positive edge of DCLK
Float time
Positive edge of DCLK for last command bit to bus float
Bus driving time
Positive edge of DCLK for last command bit to bus
drive
Data valid time
Positive edge of DCLK to bus valid
Hold time data bit
Data valid after positive edge of DCLK
Hold time chip select
Positive edge DCLK to negative edge of chip select
Bus floating time
Negative edge of chip select to float bus
Setup time data bit at write access
Data valid to positive edge of DCLK
Hold time data bit at write access
Data valid after positive edge of DCLK
Bus floating time
Negative edge of chip select to float bus
Amplitude ratio mismatch at room
Amplitude ratio tracking accuracy
Total Harmonic Distortion
over temperature
Capacitive Load
DC Offset Drift
temperature
Parameter
Slew Rate
DC Offset
Parameter
Ratiometric to V
Revision 1.9
-40 to 150ºC
-40 to 150ºC
Condition
Condition
DD
DCLK/
DCLK/
DCLK/
DCLK/
0.294
Min
2+0
2+0
2+0
2+0
0.49
Min
30
30
15
30
15
-50
-2
0
-
-
-
-1
Typ
Typ
0.3
0.5
1
DCLK/
DCLK/
0.306
2+30
Max
1000
2+0
Max
0.51
+50
0.2
30
30
+1
-
-
-
-
-
-
-
-
-
2
V / V
V / V
µV/ºC
Unit
V/µs
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
%
%
%
7 - 24
DD
DD

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