92HD700DX5PRGXYYX IDT [Integrated Device Technology], 92HD700DX5PRGXYYX Datasheet - Page 33
92HD700DX5PRGXYYX
Manufacturer Part Number
92HD700DX5PRGXYYX
Description
10-CHANNEL HIGH DEFINITION AUDIO CODEC
Manufacturer
IDT [Integrated Device Technology]
Datasheet
1.92HD700DX5PRGXYYX.pdf
(181 pages)
- Current page: 33 of 181
- Download datasheet (2Mb)
IDT™
92HD700
10-CHANNEL HIGH DEFINITION AUDIO CODEC
10-CHANNEL HIGH DEFINITION AUDIO CODEC
6.2.9.
6.2.10. AFG OutAmpCap
AFG GPIOCnt
[29:24]
[23:16]
[15:8]
Bit
[1]
[0]
[7:0]
[31]
[30]
Bit
Get
Get
Bitfield Name
D1Sup
D0Sup
Bitfield Name
NumGPIOs
NumGPOs
NumGPIs
GPIWake
GPIUnsol
Rsvd
Table 26. AFG SupPwrState Command Response Format
Table 28. AFG GPIOCnt Command Response Format
Table 29. AFG OutAmpCap Command Verb Format
Table 27. AFG GPIOCnt Command Verb Format
RW
R
R
IDT CONFIDENTIAL
Verb ID
RW
Verb ID
Reset
R
R
R
R
R
R
0x1
0x1
F00
F00
33
0x03 = 48-pin
Power State D1 is supported. Allows for lowest possible
power consuming state from which it can return to fully on
state within 10ms, excepting analog pass-through circuits
which must remain fully on.
Power State D0 is supported. Node power state is fully on.
Reset
0x00
0x00
0x1
0x1
0x0
Wake capability. Assuming the Wake Enable
Mask controls are enabled, GPIOs configured
as inputs can cause a wake (generate a
Status Change event on the link) when there
is a change in level on the pin.
Unsolicited Response capability. Assuming
the Unsolicited Enable Mask controls are
enabled, GPIOs configured as inputs can
generate an Unsolicited Response on the link
when there is a change in level on the pin.
Reserved
Number of GPI pins supported by function
Number of GPO pins supported by function
Number of GPIO pins supported by function
Payload
Payload
11
12
92HD700
Description
Description
See bitfield table.
See bitfield table.
Response
Response
PC AUDIO
V 1.2 112006
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