L-FW323-06-DB AGERE [Agere Systems], L-FW323-06-DB Datasheet - Page 20

• Manufacturer Part Number: L-FW323-06-DB
• Description: PCI PHY/Link Open Host Controller Interface
• Manufacturer: AGERE [Agere Systems]

FW323 06 1394a
PCI PHY/Link Open Host Controller Interface
Pin Information
Table 1. Pin Descriptions (continued)
* Active-low signals within this document are indicated by an N following the symbol names.
20
20
115
116
117
118
119
120
107
108
109
110
111
112
113
114
Pin
TPBIAS1
TPBIAS0
Symbol*
PLLV
PLLV
TPA1+
TPB0–
TPB0+
TPA0+
TPA1–
TPA0–
V
V
R0
R1
SSA
DDA
DD
SS
(continued)
Analog I/O
Analog I/O
Analog I/O
Analog I/O
Analog I/O
Type
—
—
—
—
I
Port 1, Port Cable Pair A. TPA1± is the port A connection to the
twisted-pair cable. Board traces from each pair of positive and nega-
tive differential signal pins should be kept matched and as short as
possible to the external load resistors and to the cable connector.
When the FW323’s 1394 port pins are not wired to a connector, the
unused port pins may be left unconnected. Internal connect-detect
circuitry will keep the port in a disconnected state.
Port 1, Twisted-Pair Bias. TPBIAS1 provides the 1.86 V nominal
bias voltage needed for proper operation of the twisted-pair cable
drivers and receivers and for sending a valid cable connection signal
to the remote nodes. When the FW323’s 1394 port pins are not
wired to a connector, the unused port pins may be left unconnected.
Internal connect-detect circuitry will keep the port in a disconnected
state.
Port 0, Port Cable Pair B. TPB0± is the port B connection to the
twisted-pair cable. Board traces from each pair of positive and nega-
tive differential signal pins should be kept matched and as short as
possible to the external load resistors and to the cable connector.
When the FW323’s 1394 port pins are not wired to a connector, the
unused port pins may be left unconnected. Internal connect-detect
circuitry will keep the port in a disconnected state.
Port 0, Port Cable Pair A. TPA0± is the port A connection to the
twisted-pair cable. Board traces from each pair of positive and nega-
tive differential signal pins should be kept matched and as short as
possible to the external load resistors and to the cable connector.
When the FW323’s 1394 port pins are not wired to a connector, the
unused port pins may be left unconnected. Internal connect-detect
circuitry will keep the port in a disconnected state.
Port 0, Twisted-Pair Bias. TPBIAS0 provides the 1.86 V nominal
bias voltage needed for proper operation of the twisted-pair cable
drivers and receivers and for sending a valid cable connection signal
to the remote nodes. When the FW323’s 1394 port pins are not
wired to a connector, the unused port pins may be left unconnected.
Internal connect-detect circuitry will keep the port in a disconnected
state.
Analog Circuit Ground. All V
a low-impedance ground plane.
Analog Circuit Power. V
the device.
Current Setting Resistor. An internal reference voltage is applied to
a resistor connected between R0 and R1 to set the operating current
and the cable driver output current. A low temperature-coefficient
resistor (TCR) with a value of 2.49 kΩ ± 1% should be used to meet
the IEEE 1394-1995 standard requirements for output voltage limits.
Power for PLL Circuit. PLLV
portion of the device.
Ground for PLL Circuit. PLLV
plane.
DDA
Description
supplies power to the analog portion of
DD
SSA
SS
supplies power to the PLL circuitry
is tied to a low-impedance ground
signals should be tied together to
Data Sheet, Rev. 1
December 2005
Agere Systems Inc.