GS880V37AT GSI [GSI Technology], GS880V37AT Datasheet - Page 3

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GS880V37AT

Manufacturer Part Number
GS880V37AT
Description
256K x 36 9Mb Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
TQFP Pin Description
Rev: 1.03 7/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
ADSP, ADSC
V
Symbol
DDQ
B
B
A
E
V
V
ADV
DQ
DQ
DQ
DQ
LBO
GW
V
BW
A
C
0
NC
CK
1
ZZ
E
DDQ
DDQ
G
A
, A
, B
, B
, E
SS
/DNU
2
A
B
C
D
1
B
D
3
Type
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
3/18
Address Strobe (Processor, Cache Controller); active low
Address field LSBs and Address Counter preset Inputs
Byte Write Enable for DQ
Byte Write Enable for DQ
Burst address counter advance enable; active low
Global Write Enable—Writes all bytes; active low
Byte Write—Writes all enabled bytes; active low
Linear Burst Order mode; active low
Do Not Use (must be left floating)
V
Sleep Mode control; active high
Clock Input Signal; active high
DDQ
Data Input and Output pins
Output driver power supply
Output Enable; active low
Chip Enable; active high
Chip Enable; active low
I/O and Core Ground
or V
Core power supply
Address Inputs
Description
No Connect
DD
(must be tied high)
A
C
or
, DQ
, DQ
B
D
Data I/Os; active low
Data I/Os; active low
GS880V37AT-250/225/200
© 2002, GSI Technology

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