UPD6461GS NEC [NEC], UPD6461GS Datasheet - Page 29

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UPD6461GS

Manufacturer Part Number
UPD6461GS
Description
CMOS LSI CHIP FOR CAMCORDER ON-SCREEN CHARACTER DISPLAY 12 ROWS x 24 COLUMNS
Manufacturer
NEC [NEC]
Datasheet

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• Control bits for the horizontal display start position
• Control bits for the vertical display start position
(12/f
Hsync pin. The 32 positions are calculated by adding 12 dots, one to 32 times, to the position equivalent to 16 clock
pulses (16/f
steps in units of nine lines when specified with a mask option). The minimum settable position is three lines from a
rising edge of the vertical synchronizing signal input to the Vsync pin.
A : 3H (2
B :
These bits are used to specify the horizontal display start position (timing) as one of 32 steps in units of 12 dots
These bits are used to specify the vertical display start position as one of 32 steps in units of three lines (or 32
OSC
f
OSC
Vertical synchronizing signal (Vsync)
12
(MHz)). Settable positions are based on the rising edge of the horizontal synchronizing signal input to the
(MHz)
4
9H when units of nine lines are selected by specifying a mask option
V4+2
OSC
f
OSC
(MHz)) from the rising edge (f
3
(2
V3+2
: LC oscillation frequency or external input clock frequency H : Line
4
B
H4+2
2
V2+2
3
H3+2
1
V1+2
2
H2+2
A
0
V0)+1H
1
H1+2
0
H0+1) +
OSC
(MHz): LC oscillation frequency or external input clock frequency).
f
OSC
(MHz)
4
Horizontal synchronizing signal (Hsync)
Display area of 12 rows x 24 columns
PD6461, 6462
29

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