EDD5108ADTA-7A ELPIDA [Elpida Memory], EDD5108ADTA-7A Datasheet - Page 39

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EDD5108ADTA-7A

Manufacturer Part Number
EDD5108ADTA-7A
Description
512M bits DDR SDRAM
Manufacturer
ELPIDA [Elpida Memory]
Datasheet
DM Control
DM can mask input data. In 16 products, UDM and LDM can mask the upper and lower byte of input data
respectively. By setting DM to Low, data can be written. When DM is set to High, the corresponding data is not
written, and the previous data is held. The latency between DM input and enabling/disabling mask function is 0.
Data Sheet E0384E30 (Ver. 3.0)
DQS
DQ
DM
t1
EDD5104ADTA, EDD5108ADTA, EDD5116ADTA
Mask
t2
Write mask latency = 0
DM Control
39
t3
Mask
t4
t5
t6

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