X24640P-1.8 XICOR [Xicor Inc.], X24640P-1.8 Datasheet - Page 5

• Manufacturer Part Number: X24640P-1.8
• Description: 400KHz 2-Wire Serial E 2 PROM with Block Lock
• Manufacturer: XICOR [Xicor Inc.]

X24640
Figure 4. Device Addressing
DEVICE ADDRESSING
Following a start condition, the master must output the
address of the slave it is accessing. The first four bits
of the Slave Address Byte are the device type identifier
bits. These must equal “1010”. The next 3 bits are the
device select bits S
devices to share a single bus. These bits are
compared to the S
pins. The last bit of the Slave Address Byte defines the
operation to be performed. When the R/W bit is a one,
then a read operation is selected. When it is zero then
a write operation is selected. Refer to figure 4. After
loading the Slave Address Byte from the SDA bus, the
device compares the device type bits with the value
“1010” and the device select bits with the status of the
0
0
, S
, S
1
1
, and S
, and S
2
2
. This allows up to 8
device select input
A7
D7
0
1
DEVICE TYPE
IDENTIFIER
X24640 WORD ADDRESS BYTE 1
D6
A6
0
LOW ORDER WORD ADDRESS
0
WORD ADDRESS BYTE 0
SLAVE ADDRESS BYTE
A5
D5
0
1
A12
DATA BYTE
A4
D4
HIGH ORDER WORD ADDRESS
0
5
device select input pins. If the compare is not successful,
no acknowledge is output during the ninth clock cycle
and the device returns to the standby mode.
The word address is either supplied by the master or
obtained from an internal counter, depending on the
operation. The master must supply the two Word
Address Bytes as shown in figure 4.
The internal organization of the E
32 bytes per page. The page address is partially
contained in the Word Address Byte 1 and partially in
bits 7 through 5 of the Word Address Byte 0. The byte
address is contained in bits 4 through 0 of the Word
Address Byte 0. See figure 4.
A11
S 2
A3
D3
SELECT
DEVICE
A10
S 1
A2
D2
S 0
A9
A1
D1
R/ W
A8
A0
D0
7038 FM 06
2
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