SI8600AC-B-ISR Silicon Laboratories, SI8600AC-B-ISR Datasheet

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SI8600AC-B-ISR

Manufacturer Part Number
SI8600AC-B-ISR
Description
3.75 kVrms 2-channel bi-directional and 1-channel uni-directional 12C digital isolator -- Channel Type: Bidirectional...
Manufacturer
Silicon Laboratories
Datasheet

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SI8600AC-B-ISR
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SI8600AC-B-ISR
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B
D
Features
Applications
Description
The Si860x series of isolators are single-package galvanic isolation solutions for I
and SMBus serial port applications. These products are based on Silicon Labs
proprietary RF isolation technology and offer shorter propagation delays, lower
power consumption, smaller installed size, and more stable operation with
temperature and age versus opto couplers or other digital isolators.
All devices in this family include hot-swap, bidirectional SDA and/or SCL isolation
channels with open-drain, 35 mA sink capability that operate to a maximum
frequency of 1.7 MHz. The 8-pin version (Si8600) supports bidirectional SDA and
SCL isolation; the Si8602 supports bidirectional SDA and unidirectional SCL
isolation, and the 16-pin versions (Si8605, Si8606) feature two unidirectional
isolation channels to support additional system signals, such as interrupts or resets.
All versions contain protection circuits to guard against data errors when an
unpowered device is inserted into a powered system.
Small size, low installed cost, low power consumption, and short propagation delays
make the Si860x family the optimum solution for isolating I
ports.
Safety Regulatory Approval
Rev. 1.1 3/12
Independent, bidirectional SDA and
SCL isolation channels


Unidirectional isolation channels
support additional system signals
(Si8605, Si8606)
Up to 5000 V
UL, CSA, VDE recognition
60-year life at rated working voltage
Isolated I
Power over Ethernet
Motor Control Systems
UL 1577 recognized

CSA component notice 5A approval

IDIRECTIONAL
IGITA L
sink current
(reinforced insulation )
Open drain outputs with 35 mA
Supports I
Up to 5000 V
IEC 60950-1, 61010-1, 60601-1
2
C, PMBus, SMBus
2
RMS
C clocks up to 1.7 MHz
C
RMS
isolation
HANNELS
for 1 minute
I
2
C I
Copyright © 2012 by Silicon Laboratories





VDE certification conformity


High electromagnetic immunity
Wide operating supply voltage
Wide temperature range
Transient immunity 50 kV/µs
AEC-Q100 qualification
RoHS-compliant packages
Hot-swap applications
Intelligent Power systems
Isolated SMPS systems with PMBus
interfaces
SOLA TORS WITH
3.0 to 5.5 V
–40 to +125 °C
SOIC-8 narrow body
SOIC-16 wide body
SOIC-16 narrow body
IEC 60747-5-2
(VDE0884 Part 2)
EN60950-1 (reinforced insulation)
2
C and SMBus serial
2
C
U
NIDIRECTIONAL
Ordering Information:
See page 26.
Si860x
Si860x

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SI8600AC-B-ISR Summary of contents

Page 1

... Intelligent Power systems  Isolated SMPS systems with PMBus interfaces 2 C and SMBus serial  VDE certification conformity IEC 60747-5-2  (VDE0884 Part 2) EN60950-1 (reinforced insulation)  Copyright © 2012 by Silicon Laboratories Si860x U NIDIRECTIONAL 2 C Ordering Information: See page 26. Si860x ...

Page 2

Si860x 2 Rev. 1.1 ...

Page 3

T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Si860x 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter Ambient Operating Temperature* Supply Voltage *Note: The maximum ambient temperature is dependent on data frequency, output loading, number of operating channels, and supply voltage. Table 2. Si860x Power Characteristics* 3.0 ...

Page 5

Table 2. Si860x Power Characteristics* (Continued) 3.0 V < VDD < 5 –40 to +125 °C. Typical specs at 25 °C (See Figures 2 and 9 for test diagrams.) Parameter Symbol Si8606 Supply Current AVDD Current Idda ...

Page 6

Si860x Table 3. Si8600/02/05/06 Electrical Characteristics for Bidirectional I 3.0 V < VDD < 5 –40 to +125 °C. Typical specs at 25 °C unless otherwise noted. Parameter Timing Specifications (Measured at 1.40 V Unless Otherwise Specified) ...

Page 7

Table 4. Electrical Characteristics for Unidirectional Non-I 3.0 V < VDD < 5 –40 to +125 °C. Typical specs at 25 °C Parameter Symbol Positive-Going Input Threshold Negative-Going Input Threshold Input Hysteresis High Level Input Voltage Low ...

Page 8

Si860x Table 5. Electrical Characteristics for All I 3.0 V < VDD < 5 –40 to +125 °C. Typical specs at 25 °C Parameter VDD Undervoltage Threshold VDD Undervoltage Threshold VDD Negative-Going Lockout Hysteresis Common Mode Transient ...

Page 9

Test Circuits Figure 2 depicts the timing test diagram Figure 2. Simplified Timing Test Diagram Table 6. Regulatory Information* CSA The Si860x is certified under CSA Component Acceptance Notice 5A. For ...

Page 10

Si860x Table 7. Insulation and Safety-Related Specifications Parameter Symbol 1 L(1O1) Nominal Air Gap (Clearance) Nominal External Tracking L(1O2) 1 (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Proof Tracking Index) Erosion Depth 2 Resistance (Input-Output) 2 Capacitance (Input-Output) 3 ...

Page 11

Table 9. IEC 60747-5-2 Insulation Characteristics for Si86xxxx* Symbol Parameter Maximum Working Insulation V Voltage Input to Output Test Voltage V Transient Overvoltage Pollution Degree (DIN VDE 0110, Table 1) Insulation Resistance 500 V ...

Page 12

Si860x Table 11. Thermal Characteristics Parameter IC Junction-to-Air Thermal Resistance 400 300 270 200 160 100 0 0 Figure 3. NB SOIC-8 Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-2 500 400 350 ...

Page 13

Figure 5. WB SOIC-16 Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-2 Table 12. Absolute Maximum Ratings Parameter 2 Storage Temperature Ambient Temperature Under ...

Page 14

Si860x 2. Functional Description 2.1. Theory of Operation The operation of an Si86xx channel is analogous to that of an opto coupler, except an RF carrier is modulated instead of light. This simple architecture provides a robust isolated data path ...

Page 15

Typical Application Overview 2 3. Background 2 In many applications SMBus, and PMBus interfaces require galvanic isolation for safety or ground loop elimination. For example, Power over Ethernet (PoE) applications typically use an I between ...

Page 16

Si860x 2 3. Isolator Design Constraints 2 Table 13 lists the I C isolator design constraints. Design Constraint To prevent the latch condition, the isolator output low level must be greater than the isolator input low level. The ...

Page 17

Typical Application Schematics Figures 9 through 14 illustrate typical circuit configurations using the Si8600, Si8602, Si8605, and Si8606. AVDD 0.1 µ ASDA ASCL AGND Figure 9. Typical Si8600 Application Diagram AVDD 0.1 µF 3k ASDA ASCL AGND ...

Page 18

Si860x AGND AVDD 0.1 µF 3k ASDA ASCL AGND Figure 12. Typical Si8602 Application Diagram AVDD 0.1 µ ASDA RESET Micro- controller ASCL AGND Figure 13. Typical Si8605 Application Diagram AVDD 0.1 µ ASDA RESET INT ...

Page 19

Device Operation Device behavior during start-up, normal operation, and shutdown is shown in Figure 15, where UVLO+ and UVLO- are the positive-going and negative-going thresholds respectively. Refer to Table 14 to determine outputs when power supply (VDD) is not ...

Page 20

Si860x 4.3. Input and Output Characteristics for Non-I The unidirectional Si86xx inputs and outputs are standard CMOS drivers/receivers. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the value of ...

Page 21

Layout Recommendations To ensure safety in the end user application, high voltage circuits (i.e., circuits with >30 V separated from the safety extra-low voltage circuits (SELV is a circuit with <30 V (creepage/clearance component, such as a ...

Page 22

Si860x 4.6. Typical Performance Characteristics The typical performance characteristics depicted in the following diagrams are for information purposes only. Refer to Tables and 5 for actual specification limits. Side A Side B 2 Figure 16 ...

Page 23

Pin Descriptions 1 AVDD Bidirectional ASDA 2 Isolator Channel Bidirectional ASCL 3 Isolator Channel AGND 4 Si8600 Table 15. Si8600/02 in SOIC-8 Package Pin Name 1 AVDD Side A power supply terminal; connect to a source of 3.0 to ...

Page 24

Si860x AGND AVDD ASDA 5 ASCL 6 7 AGND NC 8 Table 16. Si8600/02 in Narrow and Wide-Body SOIC-16 Packages Pin Name 1 AGND Side A Ground Terminal connection. 3 AVDD ...

Page 25

AVDD Bidirectional ASDA 3 Isolator Channel Unidirectional 4 ADIN Isolator Channel Unidirectional ADOUT 5 Isolator Channel ASCL Bidirectional 6 Isolator Channel NC 7 AGND 8 Si8605 Table 17. Si8605/06 in Narrow and Wide-Body SOIC-16 Packages Pin Name ...

Page 26

... Si8600AC-B-IS 2 Si8600AD-B-IS 2 Si8602AC-B-IS 1 Si8602AD-B-IS 1 Si8605AC-B-IS1 2 Si8605AD-B-IS 2 Si8606AC-B-IS1 2 Si8606AD-B-IS 2 2,3 Revision A Devices Si8600AC-A-IS 2 Si8600AD-A-IS 2 Si8602AC-A-IS 1 Si8602AD-A-IS 1 Si8605AC-A-IS1 2 Si8605AD-A-IS 2 Si8606AC-A-IS1 2 Si8606AD-A-IS 2 Notes: 1. All packages are RoHS-compliant with peak reflow temperature of 260 °C according to the JEDEC industry standard classifications and peak solder temperature. ...

Page 27

Package Outline: 16-Pin Wide Body SOIC Figure 21 illustrates the package details for the Si860x Digital Isolator. Table 19 lists the values for the dimensions shown in the illustration. Table 19. Package Diagram Dimensions Figure 21. 16-Pin Wide Body ...

Page 28

Si860x 8. Land Pattern: 16-Pin Wide-Body SOIC Figure 22 illustrates the recommended land pattern details for the Si860x in a 16-pin wide-body SOIC. Table 20 lists the values for the dimensions shown in the illustration. Table 20. 16-Pin Wide Body ...

Page 29

Package Outline: 8-Pin Narrow Body SOIC Figure 23 illustrates the package details for the Si860x in an 8-pin SOIC (SO-8). Table 21 lists the values for the dimensions shown in the illustration. Figure 23. 8-pin Small Outline Integrated Circuit ...

Page 30

Si860x 10. Land Pattern: 8-Pin Narrow Body SOIC Figure 24 illustrates the recommended land pattern details for the Si860x in an 8-pin narrow-body SOIC. Table 22 lists the values for the dimensions shown in the illustration. Figure 24. PCB Land ...

Page 31

Package Outline: 16-Pin Narrow Body SOIC Figure 25 illustrates the package details for the Si860x in a 16-pin narrow-body SOIC (SO-16). Table 23 lists the values for the dimensions shown in the illustration. Figure 25. 16-pin Small Outline Integrated ...

Page 32

Si860x Table 23. Package Diagram Dimensions (Continued) Dimension h θ aaa bbb ccc ddd Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to the JEDEC ...

Page 33

Land Pattern: 16-Pin Narrow Body SOIC Figure 26 illustrates the recommended land pattern details for the Si860x in a 16-pin narrow-body SOIC. Table 24 lists the values for the dimensions shown in the illustration. Figure 26. 16-Pin Narrow Body ...

Page 34

Si860x 13. Top Markings 13.1. Si860x Top Marking (16-Pin Wide Body SOIC) 13.2. Top Marking Explanation (16-Pin Wide Body SOIC) Line 1 Marking: Base Part Number Ordering Options (See Ordering Guide for more information). Line 2 Marking Year ...

Page 35

Si860x Top Marking (8-Pin Narrow Body SOIC) 13.4. Top Marking Explanation (8-Pin Narrow Body SOIC) Line 1 Marking: Base Part Number Ordering Options (See Ordering Guide for more information Year Line 2 Marking Work week ...

Page 36

Si860x 13.5. Si860x Top Marking (16-Pin Narrow Body SOIC) 13.6. Top Marking Explanation (16-Pin Narrow Body SOIC) Base Part Number Line 1 Marking: Ordering Options Line 2 Marking: Circle = 1.2 mm Diameter YY = Year WW = Work Week ...

Page 37

OCUMENT HANGE IST Revision 0.1 to Revision 0.2  Si8601 replaced by Si8602 throughout.  Added chip graphics on page 1.  Moved Table 12 to page 13.  Updated Table 3, “Si8600/02/05/06 Electrical Characteristics for Bidirectional ...

Page 38

... Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per- sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages ...

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