SI8600AC-B-ISR Silicon Laboratories, SI8600AC-B-ISR Datasheet - Page 21

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SI8600AC-B-ISR

Manufacturer Part Number
SI8600AC-B-ISR
Description
3.75 kVrms 2-channel bi-directional and 1-channel uni-directional 12C digital isolator -- Channel Type: Bidirectional...
Manufacturer
Silicon Laboratories
Datasheet

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Si860x
4.4. Layout Recommendations
To ensure safety in the end user application, high voltage circuits (i.e., circuits with >30 V
) must be physically
AC
separated from the safety extra-low voltage circuits (SELV is a circuit with <30 V
) by a certain distance
AC
(creepage/clearance). If a component, such as a digital isolator, straddles this isolation barrier, it must meet those
creepage/clearance requirements and also provide a sufficiently large high-voltage breakdown protection rating
(commonly referred to as working voltage protection). Table 6 on page 9 and Table 7 on page 10 detail the working
voltage and creepage/clearance capabilities of the Si86xx. These tables also detail the component standards
(UL1577, IEC60747, CSA 5A), which are readily accepted by certification bodies to provide proof for end-system
specifications requirements. Refer to the end-system specification (61010-1, 60950-1, 60601-1, etc.) requirements
before starting any design that uses a digital isolator.
4.4.1. Supply Bypass
The Si860x family requires a 0.1 µF bypass capacitor between AVDD and AGND and BVDD and BGND. The
capacitor should be placed as close as possible to the package. To enhance the robustness of a design, it is further
recommended that the user also add 1 µF bypass capacitors and include 100  resistors in series with the inputs
and outputs if the system is excessively noisy.
4.4.2. Output Pin Termination
2
C isolator channel is approximately 50 , ±40%, which is a combination
The nominal output impedance of an non-I
of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving
loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
4.5. Fail-Safe Operating Mode
Si86xx devices feature a selectable (by ordering option) mode whereby the default output state (when the input
supply is unpowered) can either be a logic high or logic low when the output supply is powered. See Table 14 on
page 20 and "6.Ordering Guide" on page 26 for more information.
Rev. 1.1
21

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