ZADCS0822IS14T ZMDI, ZADCS0822IS14T Datasheet

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Data Sheet Rev. 2.0 / October 2011 ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family ...

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... The internal clock mode can be used synchronous conversions on several ZMDI ADCs in parallel. The “V” versions ZADCS0882V/ZADCS0842V/ ZADCS0822V are equipped with a high accurate internal 2.5V reference with an additional external ±1.5% voltage adjustment range. ...

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... Order Code 8 8 ZADCS0882VIS20T 8 8 ZADCS0882IS20T 8 4 ZADCS0842VIS16T 8 4 ZADCS0842IS16T 8 2 ZADCS0822VIS14T 8 2 ZADCS0822IS14T Sales and Further Information Zentrum Mikroelektronik ZMD America, Inc. 8413 Excelsior Drive Dresden AG Grenzstrasse 28 Suite 200 01109 Dresden Madison, WI 53717 Germany USA Phone +49 (0)351.8822.7232 Phone Fax +49 (0)351.8822.87232 Fax DISCLAIMER: This information applies to a product under development ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family Contents 1 General Device Specification 1.1. Absolute Maximum Ratings (Non Operating) 1.2. Package Pin Assignment ZADCS0882 / ZADCS0882V 1.3. Package Pin Assignment ZADCS0842 / ZADCS0842V 1.4. Package Pin Assignment ZADCS0822 / ZADCS0822V 1.5. Electrical Characteristics ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family List of Figures Figure 1 Package Pin Assignment for ZADCS0822 & ZADCS0822V........................................................................8 Figure 2 Package Pin Assignment for ZADCS0842 & ZADCS0842V........................................................................9 Figure 3 Package Pin Assignment for ZADCS0822 & ZADCS0822V......................................................................10 Figure 4: Basic application schematic ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family List of Tables Table 1: Absolute Maximum Ratings..........................................................................................................................7 Table 2: Pin list ZADCS0882 / ZADCS0882V ............................................................................................................8 Table 3: Pin list ZADCS0842 / ZADCS0842V ............................................................................................................9 Table 4: Pin list ZADCS0822 / ZADCS0822V ..........................................................................................................10 Table 5: Channel ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 1 General Device Specification 1.1. Absolute Maximum Ratings (Non Operating) Symbol Parameter V VDD to AGND, DGND DD-GND V AGND to DGND AGND-DGND CH0 – CH7, COM to AGND, DGND VREF, VREFADJ to AGND Digital ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 1.2. Package Pin Assignment ZADCS0882 / ZADCS0882V Package Name Direction Type pin number 1 nCS IN 2 DIN IN 3 DGND 4 AGND 5 VREF I/O 6 COM IN 7 CH0 IN 8 CH1 IN ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 1.3. Package Pin Assignment ZADCS0842 / ZADCS0842V Package Name Direction Type pin number 1 nCS IN 2 DIN IN 3 DGND 4 AGND 5 VREF I/O 6 COM IN 7 CH0 IN 8 CH1 IN ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 1.4. Package Pin Assignment ZADCS0822 / ZADCS0822V Package Name Direction Type pin number 1 nCS IN 2 DIN IN 3 DGND 4 AGND 5 VREF I/O 6 COM IN 7 CH0 IN 8 CH1 IN ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 1.5. Electrical Characteristics 1.5.1. General Parameters (VDD = +2. 5.25V 3.3MHz (50% duty cycle); 11 clocks/conversion cycle (300 ksps); V SCLK  ) OPmax Parameter DC Accuracy Resolution Relative Accuracy No ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 1.5.2. Specific Parameters of ZADCS08x2V versions (with Internal Reference) = 3.3MHz (50% duty cycle); 11 clocks/conversion cycle (300 ksps);  (VDD = +2. 5.25V; f SCLK Parameter Internal Reference at VREF VREF Output ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 1.5.3. Specific Parameters of basic ZADCS08x2 versions (without Internal Reference) = 3.3MHz (50% duty cycle); 11 clocks/conversion cycle (300 ksps);  (VDD = +2. 5.25V; f SCLK Parameter External Reference at VREF VREF ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 1.6. Typical Operating Characteristics Integral Nonlinearity vs. Code 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0 128 160 Code IDD vs. VDD 1500 1350 1200 IDDactive (converting) 1050 ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 2 Detailed Description 2.1. General Operation The ZADCS08x2 family is a set of classic successive approximation register (SAR) type converters. The architecture is based on a capacitive charge redistribution DAC merged with a resistor string ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 2.2. Analog Input The analog input to the converter is fully differential. Both converter input signals IN Block diagram at front page) get sampled during the acquisition period enabling the converter to be used in ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family In bipolar mode, IN can range from (IN + (IN +Vref/2) keeping the converter out of code – saturation. For instance set to a constant DC – voltage of Vref/2, then IN ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family The small-signal bandwidth of the input tracking circuitry is 3.8MHz. Hence it is possible to digitize high-speed transient events and periodic signals with frequencies exceeding the ADC’s sampling rate. This allows the application of certain ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family nCS SCLK UNI/ SGL/ DIN BIP DIF (Start) Idle SSTRB DOUT Figure 11: 24-Clock External Clock Mode Timing (f nCS SCLK UNI/ SGL/ DIN BIP ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family nCS SCLK UNI/ DIN BIP (Start) Idle SSTRB DOUT Figure 13: 16-Clock External Clock Mode Conversion nCS SCLK UNI/ DIN BIP (Start) Idle SSTRB DOUT ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family Field Programmable Gate Arrays (FPGA) or Application Specific Integrated Circuits (ASIC) may use this operation mode. Digital Timing In general the clock frequency at SCLK may vary from 0.1MHz to 3.3MHz. Considering all telegram pauses ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family Output Code Format ZADCS08x2 family devices do all support unipolar and bipolar operation modes. The digital output code is straight binary in unipolar mode. It ranges from 0x00 for an input voltage difference of 0V ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family Hardware Power Down The third power down mode is called Hardware Power-Down initiated by pulling the nSHDN pin LOW. If this condition is true, the device will immediately shut down all circuitry just ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 3 Layout To achieve optimum conversion performance care must be taken in design and layout of the application board highly recommended to use printed circuit boards instead of wire wrap designs and to ...

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ZADCS0882/0842/0822 8-Bit, 300ksps, ADC Family 4 Package Drawing ZADCS0882 devices are delivered in a 20-pin SSOP-package that has the dimensions as shown in Figure 20 and Table 9. ZADCS0842 and ZADCS0822 devices apply respective 16-pin and 14-pin SSOP-packages. Their dimensions ...

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... Dresden AG, Japan Office 2nd Floor, Shinbashi Tokyu Bldg. 4-21-3, Shinbashi, Minato-ku Tokyo, 105-0004 Japan +1 (608) 829-1987 Phone +81.3.6895.7410 +1 (631) 549-2882 Fax +81.3.6895.7301 adc@zmdi.com ZMD FAR EAST, Ltd. 3F, No. 51, Sec. 2, Keelung Road 11052 Taipei Taiwan Phone +886 2 2377 8189 Fax +886 2 2377 8199 ...