ISL2671286IBZ-T Intersil, ISL2671286IBZ-T Datasheet - Page 4

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ISL2671286IBZ-T

Manufacturer Part Number
ISL2671286IBZ-T
Description
Analog to Digital Converters - ADC 12 BIT SINGLE ENDED 20KHZ SAR ADC
Manufacturer
Intersil
Datasheet

Specifications of ISL2671286IBZ-T

Rohs
yes
Number Of Channels
1
Architecture
SAR
Conversion Rate
20 ksps
Resolution
12 bit
Input Type
Pseudo-Differential
Snr
No
Interface Type
Serial (3-Wire, SPI)
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Package / Case
SOIC-8 Narrow
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
External
Electrical Specifications
values are at T
NOTES:
10. Applies only to +IN.
Timing Specifications
operating temperature range, -40°C to +85°C.
REFERENCE INPUT
DIGITAL INPUT/OUTPUT
POWER SUPPLY REQUIREMENTS
TEMPERATURE RANGE
8. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
9. The absolute voltage applied to each analog input must be between GND and +VCC to guarantee datasheet performance.
REFLEAK
SYMBOL
t
SMPL (MAX)
I
+VCC
V
SYMBOL
C
LEAK
REF
V
V
V
C
I
V
ANA
t
OUT
t
OZ
OH
OL
t
SMPL
CONV
IH
IN
t
IL
dDO
t
DIS
EN
REF Input Range
Current Drain
Logic Family
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Data Format
Input DC Leakage Current
Input Capacitance
Floating-State Output Leakage
Current
Floating-State Output Capacitance
Power Supply Voltage
Quiescent Current
Power Down
Specified Performance
A
Analog Input Sample Time
Maximum Sampling Frequency
Conversion Time
Delay Time, DCLOCK↓ to DOUT Data Valid
Delay Time, CS/SHDN↑ to DOUT Hi-Z
Delay Time, DCLOCK↓ to DOUT Enable
= +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER
PARAMETER
4
At f
CLK
+VCC = +5V, V
= 200kHz , unless otherwise noted. Typical values are at T
CS/SHDN = VCC
t
t
I
I
t
t
CS/SHDN = VCC
OH
OL
CYC
CYC
CYC
CYC
= 250µA
= 250µA
≥ 640µs, f
= 80µs, f
≥ 640µs, f
= 90µs, f
REF
= +5V, f
TEST CONDITIONS
ISL2671286
CLK
CLK
See operating sequence; Figure 3
See operating sequence; Figure 3
See test circuits; Figure 4
See test circuits; Figure 4 (Note 11)
See test circuits; Figure 4
CLK
CLK
= 200kHz
= 200kHz
≤ 25kHz
≤ 25kHz
SAMPLE
TEST CONDITIONS
= 12.5kHz, f
CLK
= 16 • f
(Note 8)
1.25
4.50
MIN
-2.5
0.0
0.0
-40
-1
-1
3
3
SAMPLE
A
Straight Binary
= +25°C. Boldface limits apply over the
(Note 8)
(Continued)
MIN
1.5
CMOS
0.06
, unless otherwise noted. Typical
0.01
0.01
0.01
280
360
TYP
0.5
2.5
0.5
9
6
5
TYP
12
36
21
VCC + 0.05
(Note 8)
+VCC
+VCC
MAX
5.25
500
600
+85
2.5
0.8
0.4
20
20
(Note 8)
1
1
3
MAX
100
150
2.0
20
50
November 1, 2011
UNITS
Cycles
Cycles
UNITS
FN7863.0
µA
µA
µA
µA
µA
µA
µA
µA
°C
CLK
CLK
pF
pF
kHz
V
V
V
V
V
V
ns
ns
ns

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