DS2164Q+T&R Maxim Integrated, DS2164Q+T&R Datasheet - Page 9

• Manufacturer Part Number: DS2164Q+T&R
• Description: Digital Signal Processors & Controllers - DSP, DSC
• Manufacturer: Maxim Integrated
• Series: DS2164r

Specifications of DS2164Q+T&R

• Maximum Operating Temperature: + 70 C
• Package / Case: PLCC-28
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Part # Aliases: 90-2164Q+TRL

HARDWARE MODE
The hardware mode is intended for applications that do not have an external controller available or do not
require the extended features offered by the serial port. Connecting the SPS pin to V
port, clears all internal register bits, and maps the IPD, U/
bits (Table 3). In the hardware mode, both the input and output time slots default to time slot 0.
Table 3. HARDWARE MODE
NOTES:
1) SCLK must be connected to V
2) When both channels are idled, power consumption is significantly reduced.
3) The DS2164Q powers up within 800ms after either channel is returned to active from an idle state.
18
19
#
4
5
6
7
8
9
PIN
NAME
SDI
A0
A1
A2
A3
A4
A5
CS
REGISTER LOCATION
(Channel X and Y)
(Channel X and Y)
AS0/AS1/AS2
AS0/AS1/AS2
(Channel X)
(Channel X)
(Channel Y)
(Channel Y)
(Channel Y)
(Channel X)
SS
CP/
CP/
when the hardware mode is selected.
U/
U/
IPD
IPD
EX
A
EX
A
9 of 17
A
, and CP/
Channel X Coding Configuration
Channel Y Coding Configuration
Algorithm Select (Table 4)
Algorithm Select (Table 4)
Channel X Data Format
Channel Y Data Format
EX
Channel Y Idle Select
Channel X Idle Select
0 = Channel Active
0 = Channel Active
1 = Channel Idle
1 = Channel Idle
bits for both channels to external
1 = Compress
1 = Compress
FUNCTION
0 = Expand
0 = Expand
0 = A-law
0 = A-law
1 = m-law
1 = m-law
SS
disables the serial
DS2164Q