74AUP1T58GM,132 NXP Semiconductors, 74AUP1T58GM,132 Datasheet - Page 4

IC LP CONFIG GATE V-XLATR 6XSON

74AUP1T58GM,132

Manufacturer Part Number
74AUP1T58GM,132
Description
IC LP CONFIG GATE V-XLATR 6XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1T58GM,132

Logic Function
Translator
Number Of Bits
3
Input Type
Voltage
Output Type
Voltage
Number Of Channels
3
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3.8ns
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
6-XSON (Micropak™), SOT-886
Supply Voltage
2.3 V ~ 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Other names
568-4749-2
74AUP1T58GM,132
74AUP1T58GM-H
74AUP1T58GM-H
935280467132
NXP Semiconductors
Table 5.
74AUP1T58_1
Product data sheet
Logic function
2-input NAND
2-input NAND with both inputs inverted
2-input AND with inverted input
2-input NOR with inverted input
2-input OR
2-input OR with both inputs inverted
2-input XOR
Buffer
Inverter
Fig 5.
Fig 7.
Fig 9.
2-input NAND gate or 2-input OR gate with
both inputs inverted
2-input AND gate with input C inverted or
2-input NOR gate with inverted A input
2-input XOR gate
C
C
C
C
C
B
B
A
A
B
Function selection table
7.1 Logic configurations
Y
Y
Y
Y
Y
B
B
A
1
2
3
1
2
3
1
2
3
6
5
4
001aab688
6
5
4
001aab690
6
5
4
001aab692
C
Y
C
Y
C
Y
V
V
V
CC
CC
CC
Rev. 01 — 6 March 2008
Low-power configurable gate with voltage-level translator
Figure
see
see
see
see
see
see
see
see
see
Fig 6.
Fig 8.
Fig 10. Buffer
Figure 5
Figure 8
Figure 6
Figure 6
Figure 8
Figure 5
Figure 9
Figure 10
Figure 11
2-input AND gate with input B inverted or
2-input NOR gate with inverted C input
2-input OR gate or 2-input NAND gate with
both inputs inverted
B
C
B
C
A
C
A
C
A
and
and
7
7
Y
Y
Y
Y
Y
A
B
A
74AUP1T58
1
2
3
1
2
3
1
2
3
6
5
4
001aab693
© NXP B.V. 2008. All rights reserved.
6
5
4
6
5
4
001aab689
001aab691
Y
C
Y
C
Y
V
V
V
CC
CC
CC
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