NVT2002DP,118 NXP Semiconductors, NVT2002DP,118 Datasheet - Page 5

• Manufacturer Part Number: NVT2002DP,118
• Description: IC INTERFACE
• Manufacturer: NXP Semiconductors

Specifications of NVT2002DP,118

• Package / Case: 8-TSSOP (0.118", 3.00mm Width)
• Logic Function: Translator, Bidirectional, Open Drain
• Number Of Bits: 1
• Input Type: Voltage
• Output Type: Voltage
• Number Of Channels: 1
• Number Of Outputs/channel: 1
• Differential - Input:output: No/No
• Operating Temperature: -40°C ~ 85°C
• Logic Type: Voltage Level Shifter
• Supply Voltage (max): 5 V
• Supply Voltage (min): 1 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Data Rate: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-5121-2

NXP Semiconductors
6. Functional description
7. Application design-in information
NVT2001_NVT2002
Product data sheet
6.1 Function table
7.1 Enable and disable
Refer to
Table 3.
H = HIGH level; L = LOW level.
[1]
The NVT2001/02 can be used in level translation applications for interfacing devices or
systems operating at different interface voltages with one another. The NVT2001/02 is
ideal for use in applications where an open-drain driver is connected to the data I/Os. The
NVT2001/02 can also be used in applications where a push-pull driver is connected to the
data I/Os.
The NVT20xx has an EN input that is used to disable the device by setting EN LOW,
which places all I/Os in the high-impedance state.
Input EN
H
L
Fig 8.
EN is controlled by the V
operation.
(1) The applied voltages at V
Figure 1 “Logic diagram of NVT2001; NVT2002 (positive
[1]
V
Typical application circuit (switch always enabled)
MASTER
I
2
ref(A)
Function selection (example)
C-BUS
GND
V
CC
for best translator operation.
SDA
SCL
Function
An = Bn
disconnect
All information provided in this document is subject to legal disclaimers.
V
ref(A)
R PU
Rev. 1 — 30 August 2010
= 1.8 V
ref(B)
logic levels and should be at least 1 V higher than V
R PU
(1)
ref(A)
VREFA
A1
A2
and V
2
3
4
pu(D)
NVT2002
should be such that V
SW
SW
1
GND
NVT2001; NVT2002
Bidirectional voltage level translator
8 EN
7
6
5
VREFB
B1
B2
200 kΩ
V
ref(B)
pu(D)
R PU
is at least 1 V higher than
= 3.3 V
logic)”.
R PU
ref(A)
(1)
© NXP B.V. 2010. All rights reserved.
SCL
SDA
I
for best translator
DEVICE
2
C-BUS
GND
002aae134
V
CC
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