C8051F960-A-GQ Silicon Labs, C8051F960-A-GQ Datasheet - Page 91
C8051F960-A-GQ
Manufacturer Part Number
C8051F960-A-GQ
Description
8-bit Microcontrollers - MCU 128KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F960-A-GQ
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Available stocks
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Price
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Part Number:
C8051F960-A-GQ
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Quantity:
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SFR Definition 5.6. ADC0H: ADC0 Data Word High Byte
SFR Page = 0x0; SFR Address = 0xBE
SFR Definition 5.7. ADC0L: ADC0 Data Word Low Byte
SFR Page = 0x0; SFR Address = 0xBD;
5.6. Programmable Window Detector
The ADC Programmable Window Detector continuously compares the ADC0 output registers to user-pro-
grammed limits, and notifies the system when a desired condition is detected. This is especially effective in
an interrupt-driven system, saving code space and CPU bandwidth while delivering faster system
response times. The window detector interrupt flag (AD0WINT in register ADC0CN) can also be used in
polled mode. The ADC0 Greater-Than (ADC0GTH, ADC0GTL) and Less-Than (ADC0LTH, ADC0LTL)
registers hold the comparison values. The window detector flag can be programmed to indicate when mea-
sured data is inside or outside of the user-programmed limits, depending on the contents of the ADC0
Less-Than and ADC0 Greater-Than registers.
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be zeros. This register
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be the least significant bits of
Name
Reset
Name
Reset
Type
Bit
7:0
Type
Bit
7:0
Bit
Bit
should not be written when the SYNC bit is set to 1.
the accumulator high byte. This register should not be written when the SYNC bit is set to 1.
ADC0[15:8] ADC0 Data Word High
ADC0[7:0]
Name
Name
7
0
7
0
Byte.
ADC0 Data Word Low
Byte.
6
0
6
0
Description
Description
5
0
5
0
Rev. 0.5
Most Significant Byte of the
16-bit ADC0 Accumulator
formatted according to the
settings in AD0SJST[2:0].
Least Significant Byte of the
16-bit ADC0 Accumulator
formatted according to the
settings in AD0SJST[2:0].
4
0
4
0
ADC0[15:8]
ADC0[7:0]
R/W
R/W
Read
Read
3
0
3
0
2
0
2
0
Set the most significant
byte of the 16-bit ADC0
Accumulator to the value
written.
Set the least significant
byte of the 16-bit ADC0
Accumulator to the value
written.
C8051F96x
1
0
1
0
Write
Write
0
0
0
0
91
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