MAX9526AEI/V+C68 Maxim Integrated, MAX9526AEI/V+C68 Datasheet

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MAX9526AEI/V+C68

Manufacturer Part Number
MAX9526AEI/V+C68
Description
Video ICs Low-Power High-Performance NTSC/PAL Video Decoder
Manufacturer
Maxim Integrated
Type
Low Power, High Performance NTSC/PAL Video Decoderr
Datasheet

Specifications of MAX9526AEI/V+C68

Operating Supply Voltage
1.8 V
Bandwidth
180 Hz to 2 KHz
Maximum Power Dissipation
1009 mW
The MAX9526 is a low-power video decoder that con-
verts NTSC or PAL composite video signals to 8-bit or
10-bit YCbCr component video compliant with the ITU-
R BT.656 standard. The device powers up in fully oper-
ational mode and automatically configures itself to
decode the detected input standard. The MAX9526
typically consumes 200mW of power in normal opera-
tion and typically less than 100µW in shutdown mode.
An internal 10-bit, 54MHz analog-to-digital converter
(ADC) samples the input with four times oversampling.
The MAX9526 features a DC restoration circuit with off-
set correction and automatic gain control to accurately
optimize the full-scale range of the ADC.
An integrated analog anti-aliasing filter eliminates the
need for external filtering. The MAX9526 includes a 2:1
input multiplexer with automatic signal selection based
on activity at the inputs.
An internal line-locked phase-locked loop (PLL) gener-
ates the sample clock and the line-locked clock (LLC)
output to provide an ITU-compliant output. Alternatively,
the PLL can be configured to provide a sample clock
and output clock at 2x and 1x the frequency of the
crystal oscillator, respectively.
The MAX9526 provides a multiline adaptive comb filter to
reduce cross-chrominance and cross-luminance artifacts.
A single 1.8V supply is used for both the digital and
analog supplies. The digital outputs operate from a
separate +1.7V to +3.45V supply to allow direct con-
nection to a wide range of digital processors. The
MAX9526 operates over the -40°C to +125°C automo-
tive temperature range and is available in both a
28-pin QSOP and a 32-pin TQFN (5mm x 6mm).
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
Automotive Entertainment Systems
Collision Avoidance Systems
Security Surveillance/CCTV Systems
Televisions
Functional Diagrams
General Description
Applications
Low-Power, High-Performance
NTSC/PAL Video Decoder
o Supports All NTSC and PAL Standards
o Easy to Configure and Operate with Only
o Automatic Configuration and Standard Select
o 10-Bit 4x Oversampling (54Msps) ADC with True
o Flexible Output Formatting
o +1.8V Digital and Analog Supply Voltage
o +1.7V to +3.45V Digital I/O Supply Voltage
o Full Automotive Temperature Range (-40°C to
o Low-Power Modes
o 2-to-1 Video Input Mux with AGC
+ Denotes lead(Pb)-free/RoHS-compliant package.
/V denotes an automotive qualified part.
* EP = Exposed pad.
XTAL/OSC
MAX9526AEI+
MAX9526AEI/V+
MAX9526ATJ+
MAX9526ATJ/V+
DEVADDR
16 User-Programmable Registers
10-Bit Digital Processing
+125°C)
XTAL2
V
V
IN1
IN2
SDA
SCL
NTSC M, NTSC J, NTSC 4.43,
PAL B/G/H/I/D, PAL M, PAL N, PAL 60
10-Bit Parallel ITU-R BT.656 Output with
8-Bit Parallel ITU-R BT.656 Output with Separate
Shutdown (< 100µW typ)
Sleep Mode with Continuous Activity Detection
IRQ
Embedded TRS
HS and VS
(< 5mW typ)
PART
AND REGISTERS
I
PROCESSING,
GENERATION,
2
C INTERFACE
AND PLL
CLOCK
SYNC
FRONT-END
ANALOG
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
TEMP RANGE
Ordering Information
Functional Diagram
NONSTD
CLOCK
VIDEO
10
DECODER
DIGITAL
MAX9526
MAX9526
10
PIN-PACKAGE
28 QSOP
28 QSOP
32 TQFN-EP*
32 TQFN-EP*
PROCESSING
OUTPUT
19-4535; Rev 3; 2/11
Features
10
D9–D0
LLC

Related parts for MAX9526AEI/V+C68

MAX9526AEI/V+C68 Summary of contents

Page 1

... Security Surveillance/CCTV Systems Televisions Pin Configurations appear at end of data sheet. Functional Diagrams continued at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com. Low-Power, High-Performance ...

Page 2

... Activity detect clamp 150mV VIN CLMP2 unless otherwise noted. Typical values are at MIN MAX MIN TYP 1.7 1.8 1.7 1.8 1.7 3.3 42 2.2 0 1.8V 3.5 = 3.3V 6.4 0.8 0.8 0.27 0 850 550 2.0 MAX UNITS 1.9 V 1 100 µA 110 mA 1000 µA 1000 mA 10 µA 10 0.83 V P-P MΩ µA Maxim Integrated ...

Page 3

... AGC Gai n S tep ffer enti al N onl i near i ty Integ onl i near nal - to Rati Rej ecti ffer enti al P hase Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder = ...

Page 4

... T , unless otherwise noted. Typical values are at MIN MAX MIN TYP 1 0.4 0.2 0.2 ±1 1 5.5 1 0.5 0 160 180 250 375 500 750 1000 1500 2000 MAX UNITS % % % % ns MHz MHz % % % frames +5 % µs ns MHz dB ps RMS Hz Maxim Integrated ...

Page 5

... SDA and SCL Receiving Fall Time (Note 7) SDA Transmitting Fall Time (Note 7) Setup Time for STOP Condition Bus Capacitance Pulse Width of Suppressed Spike HIGH-SPEED LOGIC OUTPUTS (D9–D0, LLC) Output Low Voltage Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder = AGND DGND A ...

Page 6

... Typical values are at MIN MAX MIN TYP V x DVDDIO 0. DVDDIO 0.4V 13.5 18.5 13.5 18 -10 ±0.01 < 2V < 3.3V ±0.01 0 DVDDIO -10 ±0. -10 ±0. MAX UNITS V 23 +10 µA 0 DVDDIO 0.4 10 µA 0 DVDDIO V +10 µA +10 µ IN1 IN2 Maxim Integrated ...

Page 7

... AGC GAIN CODE (REG0x0A[3:0]) (DECIMAL) DIGITAL Cb/Cr FILTER 10 0 -10 -20 -30 -40 -50 -60 PAL NTSC -70 - FREQUENCY (MHz) Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder Typical Operating Characteristics = AGND DGND A MIN ANALOG INPUT FILTER RESPONSE 0 -10 -20 -30 -40 0 ...

Page 8

... PLL BANDWIDTH (Hz) SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE 1000 100 -40 0 TEMPERATURE (°C) POWER-SUPPLY REJECTION vs. FREQUENCY - 1.8V + 100mV AVDD P-P -45 -50 -55 -60 -65 AGCGAIN = 1111 -70 -75 -80 AGCGAIN = 0000 -85 -90 0.01 0.1 1 FREQUENCY (MHz) 1000 1500 2000 DVDD AVDD DVDDIO 40 80 120 10 Maxim Integrated ...

Page 9

... DVDDIO — 9, 17, 25, 29 N.C. — — EP Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder Single-Ended Composite Video Input 1. AC-couple the input video signal with a 0.1µF IN1 capacitor. Video Reference Bypass. Bypass V REF possible to the device. Single-Ended Composite Video Input 2. AC-couple the input video signal with a 0.1µF IN2 capacitor ...

Page 10

... BIAS 2 C register interface monitors status Analog Front-End (AFE) and V . Activity on the selected IN1 IN2 and V IN1 is selected. When there is activity then V is selected. IN1 IN2 when activity IN1 . IN2 DIGITAL CONTROL 10 10 DIGITAL TO DECODER FILTERING Maxim Integrated at IN2 IN2 ...

Page 11

... The analog AGC loop can be disabled and the gain is set manually values using the Gain Control register 0x0A. The range of analog gain is 3.5dB to 12dB. Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder FROM AFE 10 SYNC ...

Page 12

... Status register 0x01. The detected video standard is used to automatically configure the decoder. The MAX9526 detects NTSC-M (standard NTSC) and PAL B/G/H/I/D (standard PAL) Clocking Modes Digital Composite Decoding Sync Level Correction and Sync Extraction Sync Processor and Analog Copy Protection Detection Maxim Integrated ...

Page 13

... AGC uses the color burst amplitude to set the gain. The chrominance is demodulated using a subcarrier signal locked to the burst. The demodulated chrominance signals, Cb and Cr, are lowpass filtered to eliminate unwanted products of demodulation. Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder COMPOSITE AGC ADAPTIVE ...

Page 14

... PLL. This mode uses the PLL to filter high-frequency jitter on the input source. Invalid mode. The PLL can only be bypassed when the output is not a line-locked clock. Input clock = 54MHz external clock. Sample clock = input clock. Use this mode when a low-jitter, 54MHz input clock is used. Maxim Integrated ...

Page 15

... Odd Active CLKP VD[7:0] FFh 00h 00h EAV CODE HACTIVE Figure 5. Timing Diagram of ITU-R BT.656 Format D9– LLC Figure 6. Output Setup and Hold Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder TEST TIME BASE PATTERN CORRECTION INSERTION FVH EAV ...

Page 16

... LLC XTAL/OSC DOUT V MAX9526 IN LLC XTAL/OSC DOUT V MAX9526 IN LLC XTAL/OSC Q OSCILLATOR 27MHz ITU-1 27MHz ITU-2 27MHz 4-TO-1 PIXEL LEVEL MULTIPLEXER 4-CHANNEL VIDEO MUX AND CHANNEL ID INSERTER ITU-3 27MHz CTRL [0] CTRL [1] ITU-4 27MHz x4 108MHz CLOCK Maxim Integrated ...

Page 17

... SDA SCL ADDR INTERFACE Figure 8. MAX9526 Typical Application Circuit with Additional Supply Isolation CVBS IN LOOPBACK OUT Figure 9. Loopback Operation Application Diagram Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder FB 10µF 0.1µF AVDD DVDD DVDDIO 0.1µF V LLC IN1 ...

Page 18

... START con- dition. A START condition is a high-to-low transition on SDA with SCL high. A STOP condition is a low-to-high MIN TYP MAX UNITS 27.000 MHz Ω 30 ±50 ppm ± Serial Interface 2 C/SMBus™-compatible, Bit Transfer START and STOP Conditions Maxim Integrated ...

Page 19

... An unsuccessful data transfer occurs if a receiving device is busy system fault has occurred. In the event of an unsuccessful data transfer, the bus master retries communication. The master pulls Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder down SDA during the 9th clock cycle to acknowledge receipt of data when the MAX9526 is in read mode ...

Page 20

... Figure 15 illustrates the frame format for reading one byte from the MAX9526. Figure 16 illustrates the frame format for reading multiple bytes from the MAX9526 STA STO STOP CONDITION START CONDITION 1 2 NOT ACKNOWLEDGE ACKNOWLEDGE t BUF START CONDITION CLOCK PULSE FOR ACKNOWLEDGMENT 8 9 Maxim Integrated ...

Page 21

... Figure 15. Reading One Indexed Byte of Data from the MAX9526 ACKNOWLEDGE FROM MAX9526 ACKNOWLEDGE FROM MAX9526 S SLAVE ADDRESS 0 A R/W Figure 16. Reading n Bytes of Indexed Data from the MAX9526 Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder ACKNOWLEDGE FROM MAX9526 0 A REGISTER ADDRESS ACKNOWLEDGE FROM MAX9526 B7 B6 ...

Page 22

... D_CLMP_ 0 0 0x09 DIS ADCGAIN 0x0A CTHRSH 0x0B 0 CBAR 0x0C HSVS DATAZ LLCZ 0x0D PLLBW 0x0E SSLICE 0x0F Maxim Integrated POWER- ON STATE n/a n/a 0x00 0x00 0x10 0x80 0x00 0x80 0x88 0x02 0x00 0x23 0x00 0x00 0x03 0x18 ...

Page 23

... Status Register 1 REG B7 B6 0x01 0 L525 1 = 525 line video detected 625 line video detected. This output is only valid when the decoder is locked and operating normally. Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder CTHR . 1 = Line-locked PLL is locked to horizontal line rate and . IN1 0 = Line-locked PLL has lost lock since last status reg- ...

Page 24

... See register 0x00, B0 Analog Copy Protection Interrupt Enable (IACP Any change in ACP status bit (register 0x01, B0) triggers a hardware interrupt interrupt on analog copy protection changes (default). See register 0x01, B0 IHLOCK INONSTD ILSTLCK IACP Maxim Integrated ...

Page 25

... NTSC M (standard NTSC) 011: PAL M 100: N/A 101: NTSC 4.43 110: NTSC J 111: PAL60 Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder AUTOD SHDN 1 = Automatically detects 525 vs. 625 line video (default Manually programs 525 vs. 625 line video. Autodetect function can only be used to distinguish Bit B6 (525 Line) between standard PAL and standard NTSC ...

Page 26

... Default. 0xFF = Chroma gain is 255/128, or approximately 2. When ACP is detected (register 0x01, B0), 8 (decimal) is added to SATU CONT Contrast (CONT BRIGHT Brightness (BRIGHT HUE Hue (HUE SATU Saturation (SATU Maxim Integrated ...

Page 27

... To freeze the chroma gain at the default value of 17 (hex), set CRAGC = 1 and apply a soft reset. Composite AGC Disable (CMPAGC Digital composite gain frozen at default value (80 (hex)). Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder B5 B4 DCRESTORE_RANGE This bit sets the full-scale range of the DC restoration DAC ...

Page 28

... CONVERSION RANGE 1000 1001 1010 1011 1100 1101 1110 1111 CTHRSH Color Kill Disable (CRKDIS) CTHRSH BURST AMPLITUDE (mV) 1000 1001 1010 1011 1100 1101 1110 1111 (mV) 417 394 375 357 341 326 313 300 Maxim Integrated ...

Page 29

... ADC outputs can be directly connected to D9–D0 with- out filtering by setting RAWADC = 1 and DISAAFLT = 1 in register 0x0F, B5. D9–D0 ~8ns ~8ns LLC (54MHz) ~18.5ns Figure 17. Typical Setup and Hold Timings in RAWADC Mode Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder TGEnab TGTIM TGSRC MAX9526 ...

Page 30

... Test pattern 50Hz test 0 50Hz test pattern pattern 60Hz test 0 60Hz test pattern pattern 50Hz test Decoded input X pattern with 50Hz timing 60Hz test Decoded input X pattern with 60Hz timing Test Signal Timing Source (TGSRC) Color Bar Select (CBAR) Maxim Integrated ...

Page 31

... D1 and D0 are LSBs of digital component video output (default). The rising edge of horizontal sync (HS) coincides with the end of active video (rises after 3FFh 000h of EAV code). The falling edge coincides with the start of Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder B5 B4 ...

Page 32

... Slice at 64 (decimal), about 25% of the sync. 0000 = Slice at 0 (decimal), near the bottom of the All values between 0000 and 1111 are valid. 2 CLK PLLBYP PLLBW Line-Locked PLL Tracking Speed (PLLBW SSLICE Sync Slicing Level (SSLICE) sync (default). sync Maxim Integrated ...

Page 33

... N.C. 29 MAX9526 V 30 IN1 V 31 REF 32 V IN2 + *EP = EXPOSED PAD Chip Information PROCESS: CMOS Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder IRQ 12 11 SCL 10 SDA * TQFN MAX9526 Pin Configurations TOP VIEW ...

Page 34

... IN2 10kΩ XTAL/OSC SDA SCL DEVADR I.C. AGND DGND Typical Operating Circuit +3.3V OR +1.8V 0.1µF +1.8V 0.1µF LLC CLK 27MHz PARALLEL OUTPUT DVDDIO 10kΩ IRQ IRQ 47pF 27MHz XTAL2 47pF GND Maxim Integrated ...

Page 35

... RoHS status only. Package drawings may show a different suffix character, but the drawing per- tains to the package regardless of RoHS status. PACKAGE TYPE 28 QSOP 32 TQFN-EP Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder PACKAGE CODE OUTLINE NO. ...

Page 36

... For the latest package outline information and land patterns (footprints www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing per- tains to the package regardless of RoHS status. 36 Package Information (continued) Maxim Integrated ...

Page 37

... For the latest package outline information and land patterns (footprints www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing per- tains to the package regardless of RoHS status. Maxim Integrated Low-Power, High-Performance NTSC/PAL Video Decoder ...

Page 38

... Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. © Maxim Integrated DESCRIPTION Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc. Revision History PAGES CHANGED — 36 18– ...

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