MAX9526AEI/V+C68 Maxim Integrated, MAX9526AEI/V+C68 Datasheet - Page 25

• Manufacturer Part Number: MAX9526AEI/V+C68
• Description: Video ICs Low-Power High-Performance NTSC/PAL Video Decoder
• Manufacturer: Maxim Integrated
• Type: Low Power, High Performance NTSC/PAL Video Decoderr

Specifications of MAX9526AEI/V+C68

• Operating Supply Voltage: 1.8 V
• Bandwidth: 180 Hz to 2 KHz
• Maximum Power Dissipation: 1009 mW

1 = NTSC J, PAL 60, NTSC 4.43.
0 = NTSC M (standard NTSC), PAL M, PAL B/G/H/I/D
1 = 525 line video.
0 = 625 line video (or NTSC 4.43) (default).
Bit B6 sets the video line rate when AUTOD = 0. When
AUTOD = 1 (default), B6 is ignored.
1 = PAL Combination N, PAL M, NTSC 4.43, PAL 60.
0 = PAL B/G/H/I/D (standard PAL), NTSC M (standard
The 3 bits in the STDSEL register can be used to pro-
gram the expected input video format. Bit B6 (525 vs.
625 line video) can be automatically set by using the
autodetect function (see AUTOD bit description, regis-
ter 0x04, B4).
000:
001:
010:
011:
100:
101:
110:
111:
Maxim Integrated
Standard Select, Shutdown, and Control Register
NSTC), or NTSC J (default).
REG
0x04
(standard PAL), PAL Combination N (default).
Video Standard Select (STDSEL) Bit B7 (TYPE)
PAL B/G/H/I/D (standard PAL)
PAL Combination N
NTSC M (standard NTSC)
PAL M
N/A
NTSC 4.43
NTSC J
PAL60
B7
Bit B5 (Unconventional Video)
STDSEL
B6
Bit B6 (525 Line)
Low-Power, High-Performance
B5
B[7:5]
NTSC/PAL Video Decoder
AUTOD
B4
1 = Automatically detects 525 vs. 625 line video
0 = Manually programs 525 vs. 625 line video.
Autodetect function can only be used to distinguish
between standard PAL and standard NTSC. The
autodetect function requires register 0x04, B7 = B5 = 0.
1 = Low-power shutdown mode.
0 = Normal operation (default).
In shutdown, all logic outputs are low (unless pro-
grammed to high impedance using register 0x0D, B1).
I
1 = All registers and system state returned to power-on
0 = Normal operation (default).
Because all registers’ contents are set to power-on
default state, this bit clears itself after being written.
1 = Low-power sleep mode.
0 = Normal operation (default).
In sleep mode, all logic outputs are low (unless pro-
grammed to high impedance using register 0x0D, B1).
I
is still active. Activity status is available in register 0x00.
This bit resets everything on the device except the reg-
ister values. This bit is self-clearing.
1 = Soft reset.
0 = Normal operation (default).
2
2
C register contents are retained during shutdown.
C register contents are retained. Video activity detect
default conditions.
(default).
SHDN
B3
RESET
B2
Standard Autodetect (AUTOD)
Low-Power Shutdown (SHDN)
System Reset (RESET)
MAX9526
Soft Reset (RESET_S)
SLEEP
Sleep Mode (SLEEP)
B1
RESET_S
B0
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