E981.03A38HB ELMOS Semiconductor, E981.03A38HB Datasheet - Page 36

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E981.03A38HB

Manufacturer Part Number
E981.03A38HB
Description
Interface - Specialized KNX/EIB transceiver
Manufacturer
ELMOS Semiconductor
Datasheet

Specifications of E981.03A38HB

Rohs
yes
Product Type
KNX/EIB Transceiver
Operating Supply Voltage
3.3 V
Supply Current
10 mA
Maximum Power Dissipation
1 W
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 25 C
Table 21. Overview trigger register
Table 22. Trigger register
1) Access via UART service and SPI possible. In case of hard or soft reset the register is reset to the hard reset value or soft reset
value respectively.
Table 23. Alarm state register
The alarm state register is used to signal the state of the alarm functionality and to control sending of the alarm
telegram. Reading the register is allowed any time using any interface. Writing to the register is only recommended
to clear the SENT bit and allow resending of the alarm telegram. A successful alarm telegram transmission is con-
firmed to the host by sending a L_Data.confirm service on host UART interface.
Table 24. Alarm status registerPower supply registers
1) Access via UART service and SPI possible. For write access read the remarks of every bit carefully. In case of hard reset the
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Register Name
TRIGGER
TRIGGER_BUF
TRIGGER_MASK
TRIGGER_LEN1
TRIGGER_LEN0
TRIGGER
content
hard reset value
soft reset value
access
bit description
Register Name
ALARM_STAT
ALARM_BUF
ALARM_LEN1
ALARM_LEN0
ALARM_STAT
content
hard reset value
soft reset value
external access
KNX/ EIB TRANSCEIVER
PRODUCTION DATA - JUL 2, 2012
ELMOS Semiconductor AG
register is reset to the hard reset value.
MSB
-
0
-
R
EVENT :
"1": a trigger event was detected
"0": no trigger event detected
The bit is set after detecting a trigger event and can be reset by the host processor by writ-
ing a "0".
EN_OUT :
"1": enable output stage (pull down disabled)
"0": disable output stage (output tri-state, pull down enabled)
MASK_BUF :
"1": the trigger mask buffer was written completely
"0": the trigger buffer was not written completely yet
BUF :
"1": the trigger buffer was written completely
"0": the trigger buffer was not written completely yet
Bits MASK_BUF and BUF are set by the E981.03 after successful upload using host UART
interface. They may be written by the host directly.
MSB
-
0
-
R
Address
0x214
0x130 ...
0x148
0x150 ...
0x168
0x16B
0x16C
Address
0x213
0x110...
0x128
0x169
0x16A
1)
1)
-
0
-
R
-
0
-
R
1)
1)
Description
wake-up register
25 byte trigger telegram buffer
25 byte trigger telegram mask buffer
length of trigger telegram (high byte)
length of trigger telegram (low byte)
Description
alarm status register
25 byte alarm telegram buffer
length of alarm telegram (high byte)
length of alarm telegram (low byte)
-
0
-
R
-
0
-
R
1)
1)
Data Sheet
36/51
-
0
-
R
-
0
-
R
1)
1)
EVENT
0
-
R/W
-
0
-
R
1)
1)
EN_OUT MASK_BUF
1
1
R/W
PEND
0
-
R/(W)
1)
back to
back to
1)
0
0
R/W
QM-No.: 25DS0046E.01
BUF
0
-
R/W
Table 8 Register Table
Table 8 Register Table
1)
1)
E981.03
LSB
BUF
0
0
R/W
LSB
SENT
0
-
R/W
1)
1)

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