E981.03A38HB ELMOS Semiconductor, E981.03A38HB Datasheet - Page 40

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E981.03A38HB

Manufacturer Part Number
E981.03A38HB
Description
Interface - Specialized KNX/EIB transceiver
Manufacturer
ELMOS Semiconductor
Datasheet

Specifications of E981.03A38HB

Rohs
yes
Product Type
KNX/EIB Transceiver
Operating Supply Voltage
3.3 V
Supply Current
10 mA
Maximum Power Dissipation
1 W
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 25 C
Table 37. Clock divider register (high part)
1) Access via UART service and SPI possible. For write access read the remarks of every bit carefully. In case of hard or soft reset the
The device address in E981.03 is not initialized to a defined value.
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
The clock divider has a total reset value of 58.254.
When using other quartz frequencies than 7.3728 MHz
the value has to be changed to
D
Before changing the clock divider register values the
timing unit of the E981.03 runs with the accuracy of
the RC oscillator. Communication using the host UART
interface has to take that accuracy into account. Speci-
fied UART and KNX communication parameter ranges
are not guaranteed before adaption of the clock divider
register.
The PLL has a tolerance of approximately 10% to input
frequency for locking. As a result quartz frequencies
in the range between f
10% may be regarded as the nominal quartz frequen-
cy resulting in incorrect timing at the KNX and UART
interfaces. It is highly recommended not to use quartz
frequencies in that range or to change the CLK_FAC reg-
isters using SPI after each reset of the E981.03.
CLK_FAC1
content
hard reset value
soft reset value
access
Q
register is reset to the hard reset value or soft reset value respectively.
KNX/ EIB TRANSCEIVER
PRODUCTION DATA - JUL 2, 2012
ELMOS Semiconductor AG
= f
Quartz
KNX subnet adress
high byte (0x108)
KNX subnet adress
low byte (0x109)
/ 126.76532 Hz - 1
MSB
F7
1
1
R/W
Quartz, nom
1)
– 10% and f
F6
1
1
R/W
MSB
D7
A3
1)
Figure 16. KNX individual address
Quartz, nom
F5
1
1
R/W
area adress
D6
A2
Data Sheet
1)
40/51
+
D5
A1
F4
0
0
R/W
Individual Node Address
Each KNX device has a unique individual address in a
network. The individual address is a 2 byte value that
consists of an 8 bit subnetwork address and an 8 bit
device address. The device address may have any value
between 0 and 255.
The individual node address can be uploaded to the
E981.03 from host using
After upload address evaluation in E981.03 is activated.
After both hard and soft reset the address evaluation of
E981.03 is deactivated.
The device address shall be unique within a sub-net-
work.
device adress
service request U_SetAddress on UART interface
(see chapter
ing to the appropriate RAM addresses (see chapter
7.3 SPI Logical Layer
dress by writing to the KNX_ADR_STAT register.
1)
D4
A0
F3
0
0
R/W
1)
D3
L3
7.1 UART-Service Host -> UART
F2
0
0
R/W
line adress
for details) and validate the ad-
D2
L2
back to
1)
QM-No.: 25DS0046E.01
F1
1
1
R/W
D1
L1
Table 8 Register Table
1)
LSB
E981.03
D0
L0
LSB
F0
1
1
R/W
) or writ-
1)

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