TJA1028TK/5V0/20,1 NXP Semiconductors, TJA1028TK/5V0/20,1 Datasheet - Page 8

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TJA1028TK/5V0/20,1

Manufacturer Part Number
TJA1028TK/5V0/20,1
Description
LIN Transceivers LIN XCVR INTEGRATED VOLT REG
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TJA1028TK/5V0/20,1

Rohs
yes
Factory Pack Quantity
6000

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Part Number
Manufacturer
Quantity
Price
Part Number:
TJA1028TK/5V0/20,115
Manufacturer:
TE
Quantity:
20 000
NXP Semiconductors
TJA1028
Product data sheet
7.3.3 Reset (pin RSTN)
7.6.1 General fail-safe features
7.4
7.5 Remote wake-up
7.6 Fail-safe features
The output voltage on pin V
generated (pin RSTN goes LOW) if an undervoltage event is detected (V
t
undervoltage recovery threshold (V
The transceiver is the interface between a LIN master/slave protocol controller and the
physical bus in a LIN network. It is primarily intended for in-vehicle sub-networks using
baud rates from 2.4 kBd up to 20 kBd and is LIN 2.0/LIN 2.1/SAE J2602 compliant.
A remote wake-up is triggered by a falling edge on pin LIN, followed by LIN remaining
LOW for at least t
The remote wake-up request is communicated to the microcontroller in Standby mode by
a continuous LOW level on pin RXD.
Note that t
TXD is HIGH.
The following general fail-safe features have been implemented:
det(uv)(VCC)
LIN transceiver
Fig 5.
An internal pull-up towards V
is left floating by a bad solder joint or floating microcontroller port pin.
The current in the transmitter output stage is limited in order to protect the transmitter
against short circuits to pin V
A loss of power (pins V
microcontroller. There will be no reverse currents from the bus.
The LIN transmitter is automatically disabled when either EN or RSTN is LOW.
Remote wake-up behavior
wake(dom)LIN
RXD
). Pin RSTN will go HIGH again once the voltage on V
V
LIN
All information provided in this document is subject to legal disclaimers.
LIN dominant
Standby/Sleep mode
wake(dom)LIN
V
BUSdom
Sleep: floating/Standby: HIGH
is measured in Sleep and Standby modes, and in Normal mode if
Rev. 4 — 25 July 2012
BAT
CC
, followed by a rising edge on pin LIN (see
LIN recessive
is monitored continuously and a system reset signal is
and GND) has no impact on the bus line or on the
t
wake(dom)LIN
CC
BAT
uvr
on pin TXD guarantees a recessive bus level if the pin
.
LIN transceiver with integrated voltage regulator
) for t
rst
.
CC
exceeds the
LOW
Standby mode
TJA1028
© NXP B.V. 2012. All rights reserved.
Figure
015aaa088
CC
V
V
ground
BAT
BUSrec
< V
5).
uvd
for
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