L6564HTR STMicroelectronics, L6564HTR Datasheet - Page 4

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L6564HTR

Manufacturer Part Number
L6564HTR
Description
Power Factor Correction ICs High Volt Start Up 700V PFC 100uA 6mA
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6564HTR

Product Category
Power Factor Correction ICs
Rohs
yes
Maximum Power Dissipation
0.75 W
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SO-14
Minimum Operating Temperature
- 25 C

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List of figures
List of figures
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Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical system block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
IC consumption vs. V
IC consumption vs. T
V
Startup and UVLO vs. T
Feedback reference vs. T
E/A output clamp levels vs. T
UVLO saturation vs. T
OVP levels vs. T
Inductor saturation threshold vs. T
Vcs clamp vs. T
ZCD sink/source capability vs. T
ZCD clamp level vs. T
R discharge vs. T
Line drop detection threshold vs. T
VMULTpk - VVFF dropout vs. T
PFC_OK threshold vs. T
PFC_OK FFD threshold vs. T
Multiplier characteristics @VFF=1 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Multiplier characteristics @VFF=3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Multiplier gain vs. T
Gate drive clamp vs. T
Gate drive output saturation vs. T
Delay to output vs. T
Startup timer period vs. T
HV start voltage vs. T
V
HV breakdown voltage vs. T
Output voltage setting, OVP and FFP functions: internal block diagram . . . . . . . . . . . . . . 18
Voltage feedforward: squarer/divider (1/V2) block diagram and transfer characteristics . . 19
RFF·CFF as a function of 3rd harmonic distortion introduced in the input current . . . . . . . 21
THD optimizer circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
THD optimization: standard TM PFC controller (left side) and L6564H (right side) . . . . . . 23
Effect of boost inductor saturation on the MOSFET current and detection method . . . . . . 24
Interface circuits that let the DC-DC converter’s controller IC disable the L6564H . . . . . . 25
High voltage startup generator: internal schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Timing diagram: normal power-up and power-down sequences . . . . . . . . . . . . . . . . . . . . 26
High voltage startup behavior during latch-off protection . . . . . . . . . . . . . . . . . . . . . . . . . . 27
High voltage startup managing the DC-DC output short-circuit . . . . . . . . . . . . . . . . . . . . . 28
Demonstration board EVL6564H - 100 W, wide-range mains: electrical schematic. . . . . . 29
EVL6564H demonstration board: compliance to EN61000-3-2 standard . . . . . . . . . . . . . . 30
EVL6564H demonstration board: compliance to JEITA-MITI standard . . . . . . . . . . . . . . . 30
EVL6564H demonstration board: input current waveform @230 V -50 Hz - 100 W load . . 30
EVL6564H demonstration board: input current waveform @100 V - 50 Hz - 100 W load . 30
SO-14 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
CC
CC
Zener voltage vs. T
restart voltage vs. T
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Doc ID 022960 Rev 2
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L6564H

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