MCIMX286CJM4A Freescale Semiconductor, MCIMX286CJM4A Datasheet - Page 35

• Manufacturer Part Number: MCIMX286CJM4A
• Description: Processors - Application Specialized CATSKILLS REV 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX286CJM4A

• Product Category: Processors - Application Specialized
• Core: ARM926EJ-S
• Processor Series: i.MX28
• Data Bus Width: 32 bit
• Data Ram Size: 128 KB
• Operating Supply Voltage: 1.35 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Memory Type: L1 Cache, ROM, SRAM

Figure 10
in the figure.
1
3.5.4.1.3
Figure 11
the figure.
1
Freescale Semiconductor
M5
M6
M7
M8
M9
ENET0_TX_EN, ENET0_TX_CLK, and ENET0_TXD0 have the same timing in 10-Mbps 7-wire interface mode.
ENET0_COL has the same timing in 10-Mbit 7-wire interface mode.
ENET0_TXD[3:0] (outputs)
1
ID
ID
ENET0_TX_CLK (input)
ENET0_TX_CLK to ENET0_TXD[3:0], ENET0_TX_EN,
ENET0_TX_ER invalid
ENET0_TX_CLK to ENET0_TXD[3:0], ENET0_TX_EN,
ENET0_TX_ER valid
ENET0_TX_CLK pulse width high
ENET0_TX_CLK pulse width low
ENET0_CRS to ENET0_COL minimum pulse width
shows MII asynchronous input timings.
shows MII transmit signal timings.
ENET0_CRS, ENET0_COL
ENET0_TX_EN
ENET0_TX_ER
MII Asynchronous Inputs Signal Timing (ENET0_CRS and ENET0_COL)
i.MX28 Applications Processors for Consumer Products, Rev. 3
Table 40. MII Asynchronous Inputs Signal Timing
Characteristic
Figure 10. MII Transmit Signal Timing Diagram
Figure 11. MII Async Inputs Timing Diagram
Characteristic
Table 39. MII Transmit Signal Timing
1
Table 39
M5
Table 40
M6
M7
describes the timing parameters (M5–M8) shown
describes the timing parameter (M9) shown in
M9
Min.
1.5
Min.
35%
35%
M8
—
5
Max.
—
Max.
65%
65%
—
20
ENET0_TX_CLK period
Electrical Characteristics
ENET0_TX_CLK
ENET0_TX_CLK
Unit
period
period
Unit
ns
ns
35