M95320-RMB6TG STMicroelectronics, M95320-RMB6TG Datasheet - Page 3

• Manufacturer Part Number: M95320-RMB6TG
• Description: IC EEPROM 32KBIT 5MHZ 8MLP
• Manufacturer: STMicroelectronics

Specifications of M95320-RMB6TG

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 32K (4K x 8)
• Speed: 5MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-MLP, 8-UFDFPN
• Organization: 4 K x 8
• Interface Type: SPI
• Maximum Clock Frequency: 5 MHz
• Access Time: 80 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 2.5 V, 3.3 V, 5 V
• Memory Configuration: 4096 X 8
• Clock Frequency: 5MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: DFN
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8713-2; M95320-RMB6TG

M95320, M95320-W, M95320-R
7
8
9
10
11
12
6.4
6.5
6.6
Power-up and delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.1
7.2
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.3.2
6.3.3
6.3.4
Write Status Register (WRSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Read from Memory Array (READ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Write to Memory Array (WRITE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Power-up state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
WEL bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
BP1, BP0 bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SRWD bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Doc ID 5711 Rev 12
Contents
3/44