M27W401-80K6 STMicroelectronics, M27W401-80K6 Datasheet - Page 9

IC OTP 4MBIT 80NS 32PLCC

M27W401-80K6

Manufacturer Part Number
M27W401-80K6
Description
IC OTP 4MBIT 80NS 32PLCC
Manufacturer
STMicroelectronics
Datasheet

Specifications of M27W401-80K6

Format - Memory
EPROMs
Memory Type
OTP EPROM
Memory Size
4M (512K x 8)
Speed
80ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-PLCC
Density
4Mb
Organization
512Kx8
Interface Type
Parallel
Bus Type
Parallel
In System Programmable
External
Access Time (max)
80ns
Package Type
PLCC
Reprogramming Technique
OTP
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Supply Current
50mA
Pin Count
32
Mounting
Surface Mount
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1693-5

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M27W401
2.4
2.5
2.6
devices in the array and connected to the READ line from the system control bus. This
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.
System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the devices. The supply current, I
the system designer: the standby current level, the active current level, and transient current
peaks that are produced by the falling and rising edges of E. The magnitude of the transient
current peaks is dependent on the capacitive and inductive loading of the device at the
output.
The associated transient voltage peaks can be suppressed by complying with the two line
output control and by properly selected decoupling capacitors. It is recommended that a
0.1µF ceramic capacitor be used on every device between V
high frequency capacitor of low inherent inductance and should be placed as close to the
device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between
V
supply connection point.The purpose of the bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
Programming
The M27W401 has been designed to be fully compatible with the M27C4001 and has the
same electronic signature. As a result the M27W401 can be programmed as the M27C4001
on the same programming equipment applying 12.75V on V
of the same PRESTO II algorithm.
When delivered (and after each ‘1’s erasure for UV EPROM), all bits of the M27W401 are in
the '1' state. Data is introduced by selectively programming '0's into the desired bit locations.
Although only '0's will be programmed, both '1's and '0's can be present in the data word.
The only way to change a ‘0’ to a ‘1’ is by die exposure to ultraviolet light (UV EPROM). The
M27W401 is in the programming mode when V
pulsed to V
pins. The levels required for the address and data inputs are TTL. V
6.25V ± 0.25V
Presto II programming algorithm
Presto II Programming Algorithm allows the whole array to be programmed with a
guaranteed margin, in a typical time of 52.5 seconds. Programming with Presto II consists of
applying a sequence of 100µs program pulses to each byte until a correct verify occurs (see
Figure
activated in order to guarantee that each cell is programmed with enough margin. No
overprogram pulse is applied since the verify in Margin mode at VCC much higher than
3.6V, provides the necessary margin to each programmed cell.
CC
and V
5). During programming and verify operation, a Margin mode circuit is automatically
SS
IL
. The data to be programmed is applied to 8 bits in parallel to the data output
for every eight devices. The bulk capacitor should be located near the power
CC
PP
, has three segments that are of interest to
input is at 12.75V, G is at V
PP
CC
and 6.25V on V
and V
CC
SS
is specified to be
Device description
. This should be a
IH
CC
and E is
by the use
9/23

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