DS28E04S-100+T Maxim Integrated Products, DS28E04S-100+T Datasheet - Page 24

• Manufacturer Part Number: DS28E04S-100+T
• Description: IC EEPROM 4KBIT 16SOIC
• Manufacturer: Maxim Integrated Products

Specifications of DS28E04S-100+T

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 4K (256 x 16)
• Interface: 1-Wire Serial
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Speed: -

DS28E04-100: 4096-Bit 1-Wire Addressable EEPROM with PIO
SEARCH ROM [F0h]
When a system is initially brought up, the bus master might not know the number of devices on the 1-Wire bus or
their device ID numbers. By taking advantage of the wired-AND property of the bus, the master can use a process
of elimination to identify the device ID numbers of all slave devices. For each bit of the device ID number, starting
with the least significant bit, the bus master issues a triplet of time slots. On the first slot, each slave device
participating in the search outputs the true value of its device ID number bit. On the second slot, each slave device
participating in the search outputs the complemented value of its device ID number bit. On the third slot, the master
writes the true value of the bit to be selected. All slave devices that do not match the bit written by the master stop
participating in the search. If both of the read bits are zero, the master knows that slave devices exist with both
states of the bit. By choosing which state to write, the bus master branches in the romcode tree. After one complete
pass, the bus master knows the device ID number of a single device. Additional passes identify the device ID
numbers of the remaining devices. Refer to Application Note 187: 1-Wire Search Algorithm for a detailed
discussion, including an example.
Note: Since the DS28E04-100 lasered ROM CRC is calculated assuming the address inputs are all logic 1, then
any address inputs that are connected to GND are not validated. It is recommended to do a double search when
building a list of devices on the 1-Wire line.
CONDITIONAL SEARCH [ECh]
The Conditional Search ROM command operates similarly to the Search ROM command except that only those
devices, which fulfill certain conditions (CSR = 1), will participate in the search. This function provides an efficient
means for the bus master to identify devices on a multidrop system that have to signal an important event. After
each pass of the conditional search that successfully determined the 64-bit ROM code for a specific device on the
multidrop bus, that particular device can be individually accessed as if a Match ROM had been issued, since all
other devices will have dropped out of the search process and will be waiting for a reset pulse. The DS28E04-100
responds to the conditional search if the CSR signal is active. See the description of the registers at addresses
0223h to 0225h and Figure 7 for more details.
SKIP ROM [CCh]
This command can save time in a single-drop bus system by allowing the bus master to access the memory
functions without providing the 64-bit ROM code. If more than one slave is present on the bus and, for example, a
Read command is issued following the Skip ROM command, data collision occurs on the bus as multiple slaves
transmit simultaneously (open-drain pulldowns produce a wired-AND result).
RESUME [A5h]
To maximize the data throughput in a multidrop environment, the Resume function is available. This function
checks the status of the RC bit and, if it is set, directly transfers control to the Memory functions, similar to a Skip
ROM command. The only way to set the RC bit is through successfully executing the Match ROM, Search ROM, or
Overdrive Match ROM command. Once the RC bit is set, the device can repeatedly be accessed through the
Resume Command function. Accessing another device on the bus clears the RC bit, preventing two or more
devices from simultaneously responding to the Resume Command function.
OVERDRIVE SKIP ROM [3Ch]
On a single-drop bus this command can save time by allowing the bus master to access the memory functions
without providing the 64-bit ROM code. Unlike the normal Skip ROM command, the Overdrive Skip ROM sets the
DS28E04-100 in the Overdrive mode (OD = 1). All communication following this command has to occur at
Overdrive speed until a reset pulse of minimum 480µs duration resets all devices on the bus to standard speed
(OD = 0).
When issued on a multidrop bus, this command sets all Overdrive-supporting devices into Overdrive mode. To
subsequently address a specific Overdrive-supporting device, a reset pulse at Overdrive speed has to be issued
followed by a Match ROM or Search ROM command sequence. This speeds up the time for the search process. If
more than one slave supporting Overdrive is present on the bus and the Overdrive Skip ROM command is followed
by a Read command, data collision occurs on the bus as multiple slaves transmit simultaneously (open-drain
pulldowns produce a wired-AND result).
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