CY7C1339B-100AC Cypress Semiconductor Corp, CY7C1339B-100AC Datasheet - Page 10

• Manufacturer Part Number: CY7C1339B-100AC
• Description: IC SRAM 4MBIT 100MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1339B-100AC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 4M (128K x 32)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1092

Document #: 38-05141 Rev. *A
Switching Characteristics
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
Parameter
11. Unless otherwise noted, test conditions assume signal transition time of 3.0/2.5 ns or less, timing reference levels of 1.5/1.25V, input pulse levels of 0 to
12. t
13. At any given voltage and temperature, t
CYC
CH
CL
AS
AH
CO
DOH
ADS
ADH
WES
WEH
ADVS
ADVH
DS
DH
CES
CEH
CHZ
CLZ
EOHZ
EOLZ
EOV
3.0/2.5V for 3.3/2.5V V
steady-state voltage.
CHZ
, t
CLZ
, t
EOV
Clock Cycle Time
Clock HIGH
Clock LOW
Address Set-Up Before CLK Rise
Address Hold After CLK Rise
Data Output Valid After CLK Rise
Data Output Hold After CLK Rise
ADSP, ADSC Set-up Before CLK Rise
ADSP, ADSC Hold After CLK Rise
BWE, GW, BW[3:0] Set-up Before CLK Rise
BWE, GW, BW[3:0] Hold After CLK Rise
ADV Set-Up Before CLK Rise
ADV Hold After CLK Rise
Data Input Set-up Before CLK Rise
Data Input Hold After CLK Rise
Chip Select Set-up
Chip Select Hold After CLK Rise
Clock to High-Z
Clock to Low-Z
OE HIGH to Output High-Z
OE LOW to Output Low-Z
OE LOW to Output Valid
, t
EOLZ
, and t
DDQ
respectively, and output loading of the specified I
EOHZ
[12]
[12]
Description
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ± 200 mv from
Over the Operating Range
EOHZ
[12]
[12, 13]
is less than t
[12, 13]
EOLZ
and t
CHZ
[10, 12, 13]
is less than t
Min.
6.0
1.7
1.7
1.5
0.5
1.5
2.0
0.5
2.0
0.5
2.0
0.5
1.5
0.5
2.0
0.5
OL
0
0
/I
OH
-166
and load capacitance. Shown in (a) and (c) of AC test loads diagram.
CLZ
Max.
3.5
3.5
3.5
3.5
.
Min.
7.5
1.9
1.9
1.5
0.5
2.0
2.5
0.5
2.5
0.5
2.5
0.5
1.5
0.5
2.5
0.5
0
0
-133
Max.
4.0
3.5
3.5
4.0
Min.
3.5
3.5
1.5
0.5
2.0
2.5
0.5
2.5
0.5
2.5
0.5
1.5
0.5
2.5
0.5
10
0
0
CY7C1339B
-100
Max.
Page 10 of 17
5.5
3.5
5.5
5.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns