M24C64-WMN6T STMicroelectronics, M24C64-WMN6T Datasheet - Page 8

• Manufacturer Part Number: M24C64-WMN6T
• Description: IC EEPROM 64KBIT 400KHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M24C64-WMN6T

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 64K (8K x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-1620-2

Signal description
2
2.1
2.2
2.3
2.4
8/44
Signal description
Serial Clock (SCL)
This input signal is used to strobe all data in and out of the device. In applications where this
signal is used by slave devices to synchronize the bus to a slower clock, the bus master
must have an open drain output, and a pull-up resistor must be connected from Serial Clock
(SCL) to V
most applications, though, this method of synchronization is not employed, and so the pull-
up resistor is not necessary, provided that the bus master has a push-pull (rather than open
drain) output.
Serial Data (SDA)
This bidirectional signal is used to transfer data in or out of the device. It is an open drain
output that may be wire-OR’ed with other open drain or open collector signals on the bus. A
pull up resistor must be connected from Serial Data (SDA) to V
the value of the pull-up resistor can be calculated).
Chip Enable (E2, E1, E0)
(E2,E1,E0) input signals are used to set the value that is to be looked for on the three least
significant bits (b3, b2, b1) of the 7-bit device select code. These inputs must be tied to V
or V
floating), these inputs are read as low (0). For the WLCSP package, the (E2,E1,E0) inputs
are internally connected to (0,0,1).
Figure 4.
Write Control (WC)
This input signal is useful for protecting the entire contents of the memory from inadvertent
write operations. Write operations are disabled to the entire memory array when Write
Control (WC) is driven high. When unconnected, the signal is internally read as V
Write operations are allowed.
When Write Control (WC) is driven high, device select and Address bytes are
acknowledged, Data bytes are not acknowledged.
SS
, to establish the device select code as shown in
CC
Device select code
.
(Figure 5
indicates how the value of the pull-up resistor can be calculated). In
Doc ID 16891 Rev 23
E i
M24xxx
V CC
V SS
M24C64-DF, M24C64-W, M24C64-R, M24C64-F
E i
M24xxx
V CC
V SS
Ai12806
Figure
4. When not connected (left
CC
.
(Figure 5
indicates how
IL
, and
CC