W25X10AVSNIG Winbond Electronics, W25X10AVSNIG Datasheet - Page 7

• Manufacturer Part Number: W25X10AVSNIG
• Description: IC FLASH 16MBIT 100MHZ 8SOIC
• Manufacturer: Winbond Electronics

Specifications of W25X10AVSNIG

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 1M (128K x 8)
• Speed: 100MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.1
All parts are offered in an 8-pin plastic 150-mil width SOIC (package code SN)
and the 8-pad 6x5-mm WSON (package code ZP) as shown in figure 1c, and 1d respectively. The
W25X40A and W25X80A are offered in both the 8-pin plastic 208-mil width SOIC (package code SS)
as shown in figure 1b and the 8-pin 300-mil DIP (package code DA). Package diagrams and
dimensions are illustrated at the end of this datasheet.
7.2
The SPI Chip Select (/CS) pin enables and disables device operation. When /CS is high the device is
deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the devices
power consumption will be at standby levels unless an internal erase, program or status register cycle
is in progress. When /CS is brought low the device will be selected, power consumption will increase
to active levels and instructions can be written to and data read from the device. After power-up, /CS
must transition from high to low before a new instruction will be accepted. The /CS input must track
the VCC supply level at power-up (see “Write Protection” and figure 20). If needed a pull-up resister
on /CS can be used to accomplish this.
7.3
The SPI Serial Data Output (DO) pin provides a means for data and status to be serially read from
(shifted out of) the device. Data is shifted out on the falling edge of the Serial Clock (CLK) input pin.
7.4
The Write Protect (/WP) pin can be used to prevent the Status Register from being written. Used in
conjunction with the Status Register’s Block Protect (BP2, BP1, and BP0) bits and Status Register
Protect (SRP) bit, a portion or the entire memory array can be hardware protected. The /WP pin is
active low.
7.5
The Hold (/HOLD) pin allows the device to be paused while it is actively selected. When /HOLD is
brought low, while /CS is low, the DO pin will be at high impedance and signals on the DIO and CLK
pins will be ignored (don’t care). When /HOLD is brought high, device operation can resume. The
/HOLD function can be useful when multiple devices are sharing the same SPI signals. (“See Hold
function”)
7.6
The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. (“See
SPI Operations”)
7.7
The SPI Serial Data Input/Output (DIO) pin provides a means for instructions, addresses and data to
be serially written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock
(CLK) input pin. The DIO pin is also used as an output when the Fast Read Dual Output instruction is
executed.
Note 1: See “Valid Part Number and Top Side Marking” Section, Note 2 for special ordering information.
Package Types
Chip Select (/CS)
Serial Data Output (DO)
Write Protect (/WP)
HOLD (/HOLD)
Serial Clock (CLK)
Serial Data Input / Output (DIO)
W25X10A, W25X20A, W25X40A, W25X80A
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Publication Release Date: August 7, 2009
(1)
as shown in figure 1a
Revision F