MAX5970ETX+ Maxim Integrated Products, MAX5970ETX+ Datasheet - Page 29

• Manufacturer Part Number: MAX5970ETX+
• Description: IC CTLR HOT-SWAP DUAL 36TQFN
• Manufacturer: Maxim Integrated Products
• Type: Hot-Swap Controllerr

Specifications of MAX5970ETX+

• Applications: General Purpose, PCI Express
• Internal Switch(s): No
• Voltage - Supply: 2.7 V ~ 16 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0V to 16V, Dual Hot-Swap Controller with 10-Bit
Table 35. ADC Maximum Voltage Conversion Register Format (Low-Order Bits)
The voltage and current minimum- and maximum-value
records in register locations 0x08 through 0x17 can be
reset by writing a 1 to the appropriate location in register
peak_log_rst (see Table 36). The minimum-value regis-
ters are reset to 0x3FF, and the maximum-value registers
are reset to 0x00.
As long as a bit in peak_log_rst is 1, the corresponding
peak-detection registers are disabled and are cleared
to their power-up reset values. The voltage and current
Table 36. Peak-Detection Reset-Control Register Format
Table 37. Peak-Detection Hold-Control Register Format
Description:
Register Title:
Register Addresses:
Description:
Register Title:
Register Address:
Description:
Register Title:
Register Address:
Current and Voltage Monitor and 4 LED Drivers
bit 7
bit 7
bit 7
—
—
R
R
R
Using the Voltage and Current
______________________________________________________________________________________
bit 6
bit 6
bit 6
—
—
R
R
R
Peak-Detection Registers
Maximum voltage conversion result, low-order bits [1:0]
max_ch0_mon_lsb
0x0F
Reset control bits for peak-detection registers
peak_log_rst
0x41
Hold control bits for peak-detection registers; per signal
peak_log_hold
0x42
bit 5
bit 5
bit 5
—
—
R
R
R
bit 4
bit 4
bit 4
—
—
R
R
R
max_ch1_mon_lsb
0x13
Ch1_v_hld
Ch1_v_rst
bit 3
bit 3
bit 3
R/W
R/W
R
minimum- and maximum-detection register contents
for each signal can be held by setting bits in register
peak_log_hold (see Table 37). Writing a 1 to a location
in peak_log_hold locks the register contents for the cor-
responding signal and stops the min/max detection and
logging; writing a 0 enables the detection and logging.
Note that the peak-detection registers cannot be cleared
while they are held by register peak_log_hold.
The combination of these two control registers allows the
user to monitor voltage and current peak-to-peak values
during a particular time period.
Ch1_i_hld
Ch1_i_rst
bit 2
R
bit 2
bit 2
R/W
R/W
vmax_1
Ch0_v_hld
Ch0_v_rst
bit 1
R/W
bit 1
bit 1
R/W
R/W
vmax_0
Ch0_i_hld
Ch0_i_rst
bit 0
R/W
bit 0
bit 0
R/W
R/W
VALUE
RESET
0x00
VALUE
VALUE
RESET
RESET
0x00
0x00
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