TLE7230G Infineon Technologies, TLE7230G Datasheet - Page 12

• Manufacturer Part Number: TLE7230G
• Description: IC SW SMART OCTAL LOWSIDE PDSO24
• Manufacturer: Infineon Technologies
• Type: Low Sider

Specifications of TLE7230G

• Input Type: SPI
• Number Of Outputs: 8
• On-state Resistance: 800 mOhm
• Current - Output / Channel: 300mA
• Current - Peak Output: 1A
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SP000311687; TLE7230G; TLE7230GT; TLE7230GT; TLE7230GTR; TLE7230GXT

The input signal can be configured to be used as control signal of the output stages for
each channel separately. The channels 0 to 3 differ from the channels 4 to 7 in the
mapping behavior. Please refer to
The current sink to ground at the input pin ensures that the channels switch off in case
of open pin. The zener diode protects the input circuit against ESD pulses.
4.1.3
When switching off inductive loads, the potential at pin OUT rises to
because the inductance intends to continue driving the current. The voltage clamping is
necessary to prevent destruction of the device, see
the maximum allowed load inductance is limited.
Figure 5
Maximum Load Inductance
During demagnetization of inductive loads, energy has to be dissipated in the SPIDER -
TLE7230G. This energy can be calculated with following equation:
The equation simplifies under the assumption of
The energy, which is converted into heat, is limited by the thermal design of the
component.
Data Sheet
E
E
=
=
V
1
-- -
2
LI
DS(CL)
D
2
Inductive Output Clamp
⋅
⋅



Output Clamp Implementation
1
V
----------------------------------- - ln
–
bat
----------------------------------- -
V
bat
–
R
V
–
V
L
DS(CL)
V
V
bat
bat
DS(CL)
⋅






1
Figure 4
V
Block Description and Electrical Characteristics
DS(CL)
–
----------------------------------- -
V
bat
SPI Driver for Enhanced Relay Control
R
–
12
L
V
for details.
⋅
I
DS(CL)
D
R
GND
L
OUT
= 0:



Figure 5
+
I
D
V
DS
I
D
⋅
------
R
L
for details. Nevertheless,
L
L,
R
SPIDER - TLE7230G
L
V
V1.1, 2008-02-19
DS(CL)
OutputClamp .emf
potential,
(1)
(2)