TLE7230G Infineon Technologies, TLE7230G Datasheet - Page 25

• Manufacturer Part Number: TLE7230G
• Description: IC SW SMART OCTAL LOWSIDE PDSO24
• Manufacturer: Infineon Technologies
• Type: Low Sider

Specifications of TLE7230G

• Input Type: SPI
• Number Of Outputs: 8
• On-state Resistance: 800 mOhm
• Current - Output / Channel: 300mA
• Current - Peak Output: 1A
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SP000311687; TLE7230G; TLE7230GT; TLE7230GT; TLE7230GTR; TLE7230GXT

4.4
The diagnosis and control interface is based on a serial peripheral interface (SPI).
The SPI is a full duplex synchronous serial slave interface, which uses four lines: SO, SI,
SCLK and CS. Data is transferred by the lines SI and SO at the data rate given by SCLK.
The falling edge of CS indicates the beginning of a data access. Data is sampled in on
line SI at the falling edge of SCLK and shifted out on line SO at the rising edge of SCLK.
Each access must be terminated by a rising edge of CS. A modulo 8 counter ensures
that data is taken only, when a multiple of 8 bit has been transferred. The interface
provides daisy chain capability.
Figure 10
The SPI protocol is described in
power-on reset or a low signal at pin RST.
4.4.1
CS - Chip Select: The system micro controller selects the SPIDER - TLE7230G by
means of the CS pin. Whenever the pin is in low state, data transfer can take place.
When CS is in high state, any signals at the SCLK and SI pins are ignored and SO is
forced into a high impedance state.
CS High to Low transition:
• The diagnosis information is transferred into the shift register.
CS Low to High transition:
• Command decoding is only done, when after the falling edge of CS exactly a multiple
• Data from shift register is transferred into the input matrix register.
• The diagnosis flags are cleared.
SCLK - Serial Clock: This input pin clocks the internal shift register. The serial input (SI)
transfers data into the shift register on the falling edge of SCLK while the serial output
Data Sheet
SCLK
(1, 2, 3, …) of eight SCLK signals have been detected.
SO
CS
time
SI
Serial Peripheral Interface (SPI)
SPI Signal Description
MSB
MSB
Serial Peripheral Interface
14
14
13
13
12
12
11
11
Section
10
10
9
9
SPI Driver for Enhanced Relay Control
25
4.4.5. It is reset to the default values after
8
8
7
7
Serial Peripheral Interface (SPI)
6
6
5
5
4
4
SPIDER - TLE7230G
3
3
2
2
V1.1, 2008-02-19
1
1
LSB
LSB
SPI.emf