A3980KLP Allegro Microsystems Inc, A3980KLP Datasheet - Page 12

• Manufacturer Part Number: A3980KLP
• Description: IC DRIVER MICROSTEPPING 28-TSSOP
• Manufacturer: Allegro Microsystems Inc

Specifications of A3980KLP

• Applications: Stepper Motor Driver
• Number Of Outputs: 1
• Current - Output: ± 1A
• Voltage - Load: 7 V ~ 50 V
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

A3980
Mixed Decay Operation.
sequence, if the voltage on the PFD pin is between
0.6
in mixed decay mode, as shown in fi gures 5 through 8.
As the trip point is reached, the A3980 goes into fast
decay mode until the voltage on the RC pin decays to
the same level as the voltage applied to the PFD pin. The
duration of time that the bridge operates in fast decay
mode, t
over a range of values from C
from R
After this fast decay period, the A3980 switches to slow
decay mode for the remainder of the fi xed off-time
period.
Synchronous Rectifi cation
cycle is triggered by an internal fi xed-off-time cycle,
load current recirculates according to the decay mode
selected by the control logic. The synchronous rectifi ca-
tion feature turns on the appropriate FETs during current
decay, and effectively shorts out the body diodes with
the low DMOS R
tion signifi cantly, and eliminates the need for external
Schottky diodes. Synchronous rectifi cation has two
modes: Active mode and Disabled mode (described below).
Active Mode.
is set at logic low, Active mode is enabled. This mode
allows synchronous rectifi cation to occur, but when a
zero current level is detected, it also prevents reversal of
the load current by turning off synchronous rectifi cation.
This prevents the motor winding from conducting in the
reverse direction.
Disabled Mode.
is set at logic high, Disabled mode takes effect. This
mode disables synchronous rectifi cation. This mode
is typically used when external diodes are required to
transfer power dissipation from the A3980 package to
the external diodes.
×
V
T
FD
DD
= 12 kΩ to 100 kΩ.
t
FD
(ns), is estimated by
and 0.21
= R
T
DSON
When the input on the SR terminal
×
When the input on the SR terminal
C
×
T
. This reduces power dissipa-
V
×
DD
ln[0.6 (V
, the full-bridge can operate
T
= 470 pF to 1500 pF and
Depending on the step
. When a PWM-off
DD
⁄ V
PFD
Automotive DMOS Microstepping Driver
)]
Shutdown.
or an undervoltage fault on VREG, the DMOS outputs
of the A3980 are disabled until the fault condition is
removed. In the case of an overvoltage fault, the sink
DMOS FETs are switched on, and the source FETs off.
At power-up, and in the event of low V
circuit disables the DMOS outputs until V
minimum level. Once V
the translator resets to the Home state and the DMOS
outputs are re-enabled.
Thermal Protection
when the junction temperature reaches the thermal
shutdown value, typically 170C. This is intended only
to protect the A3980 from failures due to excessive junc-
tion temperatures. Thermal protection will not protect
the A3980 from continuous short circuits, and additional
fault diagnostics are integrated for this purpose. Thermal
shutdown has a hysteresis of approximately 15C.
Diagnostic Features.
tor circuits that can detect shorts to VBB, shorts to
ground, and shorted or open circuit load. Short circuits
are detected by monitoring the voltage across the driving
DMOS FETs and the open load is detected by monitor-
ing the phase current when the motor is in the Home
microstep position. All fault detection takes place fol-
lowing a delay after the blank time.
Short to VBB. A short from any of the motor connec-
tions to the battery or VBB connection is detected by
monitoring the voltage across the bottom FETs in each
full-bridge. When the FET is on, the voltage should be
no greater than the V
Characteristics table.
Short to Ground. A short from any of the motor con-
nections to ground is detected by monitoring the voltage
across the top FETs in each full-bridge. When the FET
is turned on, the voltage should be no greater than the
V
table.
DSHT
value defi ned in the Electrical Characteristics
In the event of an overtemperature fault
DSLT
DD
. All drivers are turned off
value defi ned in the Electrical
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
is above the minimum level,
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
The A3980 includes moni-
with Translator
DD
DD
, the UVLO
reaches the
12