MAX17020ETJ+T Maxim Integrated Products, MAX17020ETJ+T Datasheet - Page 28

• Manufacturer Part Number: MAX17020ETJ+T
• Description: IC CTLR PWM DUAL STEP DN 32-TQFN
• Manufacturer: Maxim Integrated Products
• Series: Quick-PWM™r

Specifications of MAX17020ETJ+T

• Applications: Power Supplies
• Current - Supply: 1mA
• Voltage - Supply: 6 V ~ 24 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

significantly higher, consider increasing the size of N
Conversely, if the losses at V
higher, consider reducing the size of N
not vary over a wide range, maximum efficiency is
achieved by selecting a high-side MOSFET (N
has conduction losses equal to the switching losses.
Choose a low-side MOSFET (N
possible on-resistance (R
ate-sized package (i.e., 8-pin SO, DPAK, or D
and is reasonably priced. Ensure that the MAX17020
DL_ gate driver can supply sufficient current to support
the gate charge and the current injected into the para-
sitic drain-to-gate capacitor caused by the high-side
MOSFET turning on; otherwise, cross-conduction prob-
lems might occur. Switching losses are not an issue for
the low-side MOSFET since it is a zero-voltage
switched device when used in the step-down topology.
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N
case power dissipation due to resistance occurs at
minimum input voltage:
Generally, use a small, high-side MOSFET to reduce
switching losses at high input voltages. However, the
R
pation often limits how small the MOSFET can be. The
optimum occurs when the switching losses equal the
conduction (R
es do not become an issue until the input is greater
than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N
it must allow for difficult-to-quantify factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PCB layout
characteristics. The following switching loss calculation
provides only a very rough estimate and is no substitute
for breadboard evaluation, preferably including verifica-
tion using a thermocouple mounted on N
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
28
DS(ON)
PD N Switching
PD N
(
______________________________________________________________________________________
H
(
required to stay within package power-dissi-
H
Re
H
DS(ON)
) due to switching losses is difficult, since
sistive
)
=
) =
⎛
⎜
⎝
Power-MOSFET Dissipation
⎛
⎜
⎝
) losses. High-side switching loss-
V
V
(
⎛
⎝ ⎜
MAX
I I N
V
2
OUT
V
DS(ON)
IN
×
)
×
C
⎞
⎠ ⎟
I
OSS
2
LOAD
IN(MAX)
×
L
(
I
), comes in a moder-
GA
) that has the lowest
I
LOAD
×
f
×
T T E
SW
f
SW
are significantly
)
⎞
⎟
⎠
2
H
H
H
:
×
×
. If V
), the worst-
Q
R
D
G SW
S S ON
(
IN
(
H
2
PAK),
)
) that
does
)
⎞
⎟ +
⎠
H
.
where C
tance, Q
side MOSFET, and I
source/sink current (1A typ).
Switching losses in the high-side MOSFET can become
a heat problem when maximum AC adapter voltages
are applied due to the squared term in the switching-
loss equation provided above. If the high-side MOSFET
chosen for adequate R
becomes extraordinarily hot when subjected to
V
lower parasitic capacitance.
For the low-side MOSFET (N
dissipation always occurs at maximum battery voltage:
The absolute worst case for MOSFET power dissipation
occurs under heavy overload conditions that are
greater than I
exceed the current limit and cause the fault latch to trip.
To protect against this possibility, “overdesign” the cir-
cuit to tolerate:
where I
allowed by the current-limit circuit, including threshold
tolerance and sense-resistance variation. The
MOSFETs must have a relatively large heatsink to han-
dle the overload power dissipation.
Choose a Schottky diode (D
drop low enough to prevent the low-side MOSFET’s
body diode from turning on during the dead time. As a
general rule, select a diode with a DC current rating
equal to 1/3 the load current. This diode is optional and
can be removed if efficiency is not critical.
The output-voltage adjustable range for continuous-
conduction operation is restricted by the nonadjustable
minimum off-time one-shot. For best dropout perfor-
mance, use the slower (200kHz) on-time setting. When
working with low input voltages, the duty-factor limit
must be calculated using worst-case values for on- and
off-times. Manufacturing tolerances and internal propa-
gation delays introduce an error to the TON K-factor.
This error is greater at higher frequencies (Table 3).
IN(MAX)
PD N
(
L
I
LOAD
VALLEY(MAX)
Re
OSS
G(SW)
, consider choosing another MOSFET with
sistive
is the high-side MOSFET’s output capaci-
≈
LOAD(MAX)
is the charge needed to turn on the high-
I
Applications Information
VALLEY MAX
)
Step-Down Converter Dropout
=
⎡
⎢
⎢
⎣
1
−
(
is the maximum valley current
GATE
⎛
⎜
⎝
DS(ON)
V
, but are not high enough to
IN MAX
V
)
OUT
(
+
L
L
is the peak gate-drive
⎛
⎜
⎝
) with a forward voltage
), the worst-case power
I
LOAD MAX
at low battery voltages
)
⎞
⎟
⎠
⎤
⎥ ⎥
⎥
⎦
(
I
LOAD
(
2
Performance
)
)
×
2
LIR
×
R
DS ON
⎞
⎟
⎠
(
)