ISL6420IAZ-TK Intersil, ISL6420IAZ-TK Datasheet - Page 11

• Manufacturer Part Number: ISL6420IAZ-TK
• Description: IC CTRLR PWM SYNC BUCK 20-QSOP
• Manufacturer: Intersil

Specifications of ISL6420IAZ-TK

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1.4MHz
• Duty Cycle: 100%
• Voltage - Supply: 4.5 V ~ 16 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QSOP
• Frequency-max: 1.4MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

GPIO1/REFIN
This is a dual function pin. If VMSET/MODE is not connected
to VCC5 then this pin serves as GPIO1. Refer to Table 2 for
GPIO1 commands interpretation.
If VMSET/MODE is connected to VCC5 then this pin will
serve as REFIN. As REFIN, this pin is the non-inverting input
to the error amplifier. Connect the desired reference voltage
to this pin in the range of 0.6V to 1.25V.
Connect this pin to VCC5 to use internal reference.
REFOUT
It provides buffered reference output for REFIN. Connect
2.2µF decoupling capacitor to this pin.
VMSET/MODE
This pin is a dual function pin. Tie this pin to VCC5 to disable
voltage margining. When not tied to VCC5, this pin serves as
VMSET. Connect a resistor from this pin to ground to set the
delta for voltage margining. If voltage margining and external
NOTES:
Enable Voltage Margining Pin Connected to GND with
No Voltage Margining.
Normal operation with
internal reference.
Buffered V
No Voltage Margining.
External reference.
Buffered V
V
8. The GPIO1/REFIN and GPIO2 pins cannot be left floating.
9. Ensure that GPIO1/REFIN is tied high prior to the logic change at VMSET/MODE.
REFIN
FUNCTION/MODES
REFOUT
REFOUT
= 0.6V.
=
TABLE 3. VOLTAGE MARGINING/DDR OR TRACKING SUPPLY PIN CONFIGURATION
resistor. It is used as VMSET.
11
VMSET/MODE
H
H
Connect a 2.2µF capacitor for
bypass of external reference.
Connect a 2.2µF capacitor to
GND.
Connect a 2.2µF capacitor to
GND.
ISL6420
REFOUT
PIN CONFIGURATIONS
reference tracking mode are not needed, this pin can be tied
directly to ground.
GPIO2
This is general purpose IO pin for voltage margining. Refer
to Table 2.
Exposed Thermal Pad
This pad is electrically isolated. Connect this pad to the
signal ground plane using at least five vias for a robust
thermal conduction path.
TABLE 2. VOLTAGE MARGINING CONTROLLED BY
GPIO1/REFIN
H
H
L
L
Serves as a general
purpose I/O. Refer to
Table 2
Connect to an external
reference voltage source
(0.6V to 1.25V)
GPIO1/REFIN AND GPIO2
GPIO1/REFIN
H (Note 9)
GPIO2
H
H
L
L
Serves as a general
purpose I/O. Refer to
Table 2
+ Delta VOUT
- Delta VOUT
No Change
GPIO2
Ignored
VOUT
February 13, 2008
L
L
FN9151.5