HIP6004DCR Intersil, HIP6004DCR Datasheet - Page 8

• Manufacturer Part Number: HIP6004DCR
• Description: IC CTRLR PWM VOLTAGE MON 20-QFN
• Manufacturer: Intersil

Specifications of HIP6004DCR

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1MHz
• Duty Cycle: 100%
• Voltage - Supply: 5 V ~ 12 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-TQFN Exposed Pad
• Frequency-max: 1MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

NOTE: 0 = connected to GND or V
Figure 5 shows the critical power components of the converter.
To minimize the voltage overshoot the interconnecting wires
indicated by heavy lines should be part of ground or power
plane in a printed circuit board. The components shown in
Figure 5 should be located as close together as possible.
Please note that the capacitors C
numerous physical capacitors. Locate the HIP6004D within 3
inches of the MOSFETs, Q
MOSFETs’ gate and source connections from the HIP6004D
must be sized to handle up to 1A peak current.
Figure 6 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
VID4
FIGURE 5. PRINTED CIRCUIT BOARD POWER AND
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
HIP6004D
VID3
UGATE
PHASE
LGATE
PGND
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
GROUND PLANES OR ISLANDS
PIN NAME
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
Q
V
Q
RETURN
VID1
and Q
2
IN
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
8
SS
IN
D
2
, 1 = connected to V
2
and C
. The circuit traces for the
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
C
O
IN
each represent
L
O
VOLTAGE DACOUT
NOMINAL OUTPUT
TABLE 1. OUTPUT VOLTAGE PROGRAM
C
O
V
OUT
1.100
1.125
1.150
1.175
1.200
1.225
1.250
1.275
1.300
1.325
1.350
1.375
1.400
1.425
1.450
DD
0
through pull-up resistors.
HIP6004D
VID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
current paths on the SS pin and locate the capacitor, C
close to the SS pin because the internal current source is
only 10μA. Provide local V
GND pins. Locate the capacitor, C
practical to the BOOT and PHASE pins.
Feedback Compensation
Figure 7 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
error amplifier (Error Amp) output (V
the oscillator (OSC) triangular wave to provide a pulse-
width modulated (PWM) wave with an amplitude of V
the PHASE node.
C
OUT
FIGURE 6. PRINTED CIRCUIT BOARD SMALL SIGNAL
SS
SS
VID3
) is regulated to the Reference voltage level. The
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
HIP6004D
PIN NAME
GND
LAYOUT GUIDELINES
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
BOOT
PHASE
VCC
C
BOOT
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
CC
+12V
decoupling between V
C
D
VCC
VID0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
BOOT
E/A
VOLTAGE DACOUT
) is compared with
NOMINAL OUTPUT
as close as
Q
Q
+V
1
2
IN
L
O
1.475
1.500
1.525
1.550
1.575
1.600
1.625
1.650
1.675
1.700
1.725
1.750
1.775
1.800
1.825
1.850
C
O
July 13, 2005
CC
FN4855.3
IN
V
SS
and
OUT
at