MAX1631EAI+T Maxim Integrated Products, MAX1631EAI+T Datasheet - Page 11

IC PS CTRLR FOR NOTEBOOKS 28SSOP

MAX1631EAI+T

Manufacturer Part Number
MAX1631EAI+T
Description
IC PS CTRLR FOR NOTEBOOKS 28SSOP
Manufacturer
Maxim Integrated Products
Type
Step-Down (Buck)r
Datasheet

Specifications of MAX1631EAI+T

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
3.3V, 5V, Adj
Current - Output
4A
Frequency - Switching
200kHz, 300kHz
Voltage - Input
4.2 ~ 30 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Power - Output
762mW
Output Voltage
2.5 V to 5.5 V, 3.3 V, 5 V
Input Voltage
4.2 V to 30 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX1630 is a dual, BiCMOS, switch-mode power-
supply controller designed primarily for buck-topology
regulators in battery-powered applications where high effi-
ciency and low quiescent supply current are critical. Light-
load efficiency is enhanced by automatic Idle Mode™
operation, a variable-frequency pulse-skipping mode that
reduces transition and gate-charge losses. Each step-
down, power-switching circuit consists of two N-channel
MOSFETs, a rectifier, and an LC output filter. The output
voltage is the average AC voltage at the switching node,
which is regulated by changing the duty cycle of the
MOSFET switches. The gate-drive signal to the N-channel
high-side MOSFET must exceed the battery voltage, and
is provided by a flying-capacitor boost circuit that uses a
100nF capacitor connected to BST_.
Devices in the MAX1630 family contain ten major circuit
blocks (Figure 2).
The two pulse-width modulation (PWM) controllers each
consist of a Dual Mode™ feedback network and multi-
plexer, a multi-input PWM comparator, high-side and
low-side gate drivers, and logic. MAX1630/MAX1631/
MAX1632 contain fault-protection circuits that monitor
the main PWM outputs for undervoltage and overvolt-
age. A power-on sequence block controls the power-
up timing of the main PWMs and determines whether
one or both of the outputs are monitored for undervolt-
age faults. The MAX1630/MAX1632/MAX1633/
MAX1635 include a secondary feedback network and
12V linear regulator to generate a 12V output from a
coupled-inductor flyback winding. The MAX1631/
MAX1634 have a secondary feedback input (SECFB)
instead, which allows a quasi-regulated, adjustable-
output, coupled-inductor flyback winding to be attached
to either the 3.3V or the 5V main inductor. Bias genera-
tor blocks include the 5V IC internal rail (VL) linear regu-
lator, 2.5V precision reference, and automatic bootstrap
switchover circuit. The PWMs share a common
200kHz/300kHz synchronizable oscillator.
These internal IC blocks aren’t powered directly from
the battery. Instead, the 5V VL linear regulator steps
down the battery voltage to supply both VL and the
gate drivers. The synchronous-switch gate drivers are
directly powered from VL, while the high-side switch
gate drivers are indirectly powered from VL via an
external diode-capacitor boost circuit. An automatic
bootstrap circuit turns off the +5V linear regulator and
powers the IC from the 5V PWM output voltage if the
output is above 4.5V.
_______________Detailed Description
______________________________________________________________________________________
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
The two PWM controllers are nearly identical. The only
differences are fixed output settings (3.3V vs. 5V), the
VL/CSL5 bootstrap switch connected to the +5V PWM,
and SECFB. The heart of each current-mode PWM con-
troller is a multi-input, open-loop comparator that sums
three signals: the output voltage error signal with
respect to the reference voltage, the current-sense sig-
nal, and the slope compensation ramp (Figure 3). The
PWM controller is a direct-summing type, lacking a tra-
ditional error amplifier and the phase shift associated
with it. This direct-summing configuration approaches
ideal cycle-by-cycle control over the output voltage.
When SKIP = low, Idle Mode circuitry automatically
optimizes efficiency throughout the load current range.
Idle Mode dramatically improves light-load efficiency
by reducing the effective frequency, which reduces
switching losses. It keeps the peak inductor current
above 25% of the full current limit in an active cycle,
allowing subsequent cycles to be skipped. Idle Mode
transitions seamlessly to fixed-frequency PWM opera-
tion as load current increases.
With SKIP = high, the controller always operates in
fixed-frequency PWM mode for lowest noise. Each
pulse from the oscillator sets the main PWM latch that
turns on the high-side switch for a period determined
by the duty factor (approximately V
high-side switch turns off, the synchronous rectifier
latch sets; 60ns later, the low-side switch turns on. The
low-side switch stays on until the beginning of the next
clock cycle.
Table 3. SKIP PWM Table
SKIP
High
High
Low
Low
CURRENT
LOAD
Heavy
Heavy
Light
Light
MODE
PWM
PWM
PWM
Idle
PWM Controller Block
Pulse-skipping, supply cur-
rent = 250µA at V
discontinuous inductor
current
Constant-frequency PWM,
continuous inductor current
Constant-frequency PWM,
continuous inductor current
Constant-frequency PWM,
continuous inductor current
DESCRIPTION
OUT
/V
IN
IN
). As the
= 12V,
11

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