IDT72V51356L7-5BB IDT, Integrated Device Technology Inc, IDT72V51356L7-5BB Datasheet - Page 24

• Manufacturer Part Number: IDT72V51356L7-5BB
• Description: IC FLOW CTRL MULTI QUEUE 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72V51356L7-5BB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V51356L7-5BB

write port for write operations. Internally the multi-queue flow-control device
monitors and maintains a status of the almost full condition of all queues within
it, however only the queue that is selected for write operations has its full status
output to the PAF flag. This dedicated flag is often referred to as the “active queue
almost full flag”. The position of the PAF flag boundary within a queue can be
at any point within that queues depth. This location can be user programmed
via the serial port or one of the default values (8 or 128) can be selected if the
user has performed default programming.
full status, when a queue is selected on the write port, this status is output via the
PAF flag. The PAF flag value for each queue is programmed during multi-queue
device programming (along with the number of queues, queue depths and
almost empty values). The PAF offset value, m, for a respective queue can be
programmed to be anywhere between ‘0’ and ‘D’, where ‘D’ is the total memory
depth for that queue. The PAF value of different queues within the same device
can be different values.
will switch to the new queue and provide the user with the new queue status,
on the second cycle after a new queue selection is made, on the same WCLK
cycle that data can actually be written to the new queue. That is, a new queue
can be selected on the write port via the WRADD bus, WADEN enable and a
rising edge of WCLK. On the second rising edge of WCLK following a queue
selection, the PAF flag output will show the full status of the newly selected queue.
The PAF is flag output is double register buffered, so when a write operation
occurs at the almost full boundary causing the selected queue status to go almost
full the PAF will go LOW 2 WCLK cycles after the write. The same is true when
a read occurs, there will be a 2 WCLK cycle delay after the read operation.
occur based on a rising edge of WCLK. Internally the multi-queue device
monitors and keeps a record of the almost full status for all queues. It is possible
that the status of a PAF flag maybe changing internally even though that flag is
not the active queue flag (selected on the write port). A queue selected on the
read port may experience a change of its internal almost full flag status based
on read operations. The multi-queue flow-control device also provides a
duplicate of the PAF flag on the PAF[3:0] flag bus, this will be discussed in detail
in a later section of the data sheet.
ALMOST EMPTY FLAG
single Programmable Almost Empty flag output, PAE. The PAE flag output
IDT72V51336/72V51346/72V51356 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(8 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
As mentioned, every queue within a multi-queue device has its own almost
When queue switches are being made on the write port, the PAF flag output
So the PAF flag delays are:
from a write operation to PAF flag LOW is 2 WCLK + t
The delay from a read operation to PAF flag HIGH is t
Note, if t
The PAF flag is synchronous to the WCLK and all transitions of the PAF flag
See Figures 22 and 23 for Almost Full flag timing and queue switching.
As previously mentioned the multi-queue flow-control device provides a
SKEW
is violated there will be one added WCLK cycle delay.
SKEW2
WAF
+ WCLK + t
WAF
24
provides a status of the almost empty condition for the active queue currently
selected on the read port for read operations. Internally the multi-queue flow-
control device monitors and maintains a status of the almost empty condition of
all queues within it, however only the queue that is selected for read operations
has its empty status output to the PAE flag. This dedicated flag is often referred
to as the “active queue almost empty flag”. The position of the PAE flag boundary
within a queue can be at any point within that queues depth. This location can
be user programmed via the serial port or one of the default values (8 or 128)
can be selected if the user has performed default programming.
empty status, when a queue is selected on the read port, this status is output via
the PAE flag. The PAE flag value for each queue is programmed during multi-
queue device programming (along with the number of queues, queue depths
and almost full values). The PAE offset value, n, for a respective queue can be
programmed to be anywhere between ‘0’ and ‘D’, where ‘D’ is the total memory
depth for that queue. The PAE value of different queues within the same device
can be different values.
will switch to the new queue and provide the user with the new queue status,
on the second cycle after a new queue selection is made, on the same RCLK
cycle that data actually falls through to the output register from the new queue.
That is, a new queue can be selected on the read port via the RDADD bus,
RADEN enable and a rising edge of RCLK. On the second rising edge of RCLK
following a queue selection, the data word from the new queue will be available
at the output register and the PAE flag output will show the empty status of the
newly selected queue. The PAE is flag output is double register buffered, so
when a read operation occurs at the almost empty boundary causing the
selected queue status to go almost empty the PAE will go LOW 2 RCLK cycles
after the read. The same is true when a write occurs, there will be a 2 RCLK
cycle delay after the write operation.
occur based on a rising edge of RCLK. Internally the multi-queue device
monitors and keeps a record of the almost empty status for all queues. It is possible
that the status of a PAE flag maybe changing internally even though that flag is
not the active queue flag (selected on the read port). A queue selected on the
write port may experience a change of its internal almost empty flag status based
on write operations. The multi-queue flow-control device also provides a
duplicate of the PAE flag on the PAE[3:0] flag bus, this will be discussed in detail
in a later section of the data sheet.
As mentioned, every queue within a multi-queue device has its own almost
When queue switches are being made on the read port, the PAE flag output
So the PAE flag delays are:
from a read operation to PAE flag LOW is 2 RCLK + t
The delay from a write operation to PAE flag HIGH is t
Note, if t
The PAE flag is synchronous to the RCLK and all transitions of the PAE flag
See Figures 24 and 25 for Almost Empty flag timing and queue switching.
SKEW
is violated there will be one added RCLK cycle delay.
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
SKEW2
RAE
+ RCLK + t
RAE