IDT80KSBR201BR IDT, Integrated Device Technology Inc, IDT80KSBR201BR Datasheet

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IDT80KSBR201BR

Manufacturer Part Number
IDT80KSBR201BR
Description
IC FLOW CTRL SRL BUFFER 484CBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT80KSBR201BR

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
80KSBR201BR
Device Overview
connect up to two high-speed Serial RapidIO interfaces. This device is
built to work with any sRIO device and especially with the IDT Pre-
Processing Switch (PPS), IDT70K2000. The SerB performs buffering
and off-loading of data as well as buffer-delay of data samples in various
applications. This device can act as either a slave, waiting for other
devices to read from it, or as a master in which the SerB writes data to a
programmed location once some criteria have been meet. This combi-
nation of storage and flexibility make it the perfect buffering solution for
sRIO systems.
Features
Block Diagram
„2007 Integrated Device Technology, Inc. All rights reserved.
The
– sRIO to sRIO
– sRIO to Parallel
– Parallel to sRIO
– Up to 288 Mbit external QDR SRAM
– 200 MHz; 18M, 36M, 72M, 144M or 288 M
– Internal and external memory functions as a single buffer
Two Independent Serial RapidIO Ports
Partial Bridging Functions
Configurable Queues and Sizes
Single/Dual Port Buffering
Optional External QDR SRAM Available
Seamless Integration of External and Internal Memory
IDT80KSBR201
is a high speed Serial Buffer (SerB) that can
sRIO SERIAL BUFFER
FLOW-CONTROL DEVICE
Figure 1. SerB Block Diagram
1 of 7
– Full, Empty, Partially Empty, Partially Full
– Serial Buffer can Either Send a Flag or Transmit Data at a
– One four-bit (x4) link, configurable to one-bit (x1) link
– Port Speeds selectable: 3.125 Gbps, 2.5 Gbps, or 1.25 Gbps
– Short haul or long haul reach for each PHY speed
– Error management supports standard and enhanced port
– sRIO version 1.3
– Class 1+ End Point Device
– Support for an optional external microprocessor or FPGA
– Supports QDRII Burst of 2 Interface
– Supports Packet or Raw-data format
– One I
– JTAG Functionality for boundary scan and programming
– 1.2V Core operation with 3.3/2.5V JTAG interface
– 23mm x 23mm, 1.0mm ball pitch
Provides Status Flags for Combined Internal/External
Memories
Direct or polled operation of flag status bus
Optional Water mark
Interface - Serial Rapid IO (sRIO)
Interface - Parallel Port
Interface - I
Interface - JTAG
10 Gbps Throughput
High-Speed CMOS Technology
Package: 484-pin Plastic Ball Grid Array
Specific Packet Count or Byte Count
operations
2
C port for maintenance and error reporting
2
C Interface Port
November 26, 2007
Product Brief
80KSBR201

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IDT80KSBR201BR Summary of contents

Page 1

Device Overview The IDT80KSBR201 is a high speed Serial Buffer (SerB) that can connect up to two high-speed Serial RapidIO interfaces. This device is built to work with any sRIO device and especially with the IDT Pre- Processing Switch (PPS), ...

Page 2

IDT 1.0 Functional Description Notes The IDT80KSBR201 on-chip memory with expansion of one QDRII SRAM externally bringing the total buffering capacity to 90Mbits of storage. This device is built to work with any sRIO device and especially with the IDT ...

Page 3

IDT The following are items of note concerning the PPS application: Notes 1. The SerB has the ability to act as a simple master. – – 2. The SerB will typically perform SWRITEs. – – 3. The DSPs have the ...

Page 4

IDT Notes 2.2 FPGA Offload Device In this application, the SerB will connect directly to an FPGA and act as a FIFO. This application may or may not use additional external memory. Since most FPGAs will avoid unnecessary intelligence, the ...

Page 5

IDT Notes In Figure 5 data for its own use. offloading of data. 2.3.2 sRIO to sRIO Buffer The simplest form of translation is where both ports regard the SerB as an end-point memory. Each port may write data to ...

Page 6

IDT 2.4 sRIO Translation Notes The translation capabilities of the SerB are primarily through the ability to read and write memory in both protocols. When going from sRIO to a lite protocol, the sRIO port will pass data into memory, ...

Page 7

IDT 3.0 Revision History 11/26/2007: Product Brief (Rev A) 4.0 Product Brief Datasheet: (Definition) “Product Brief datasheets are informational only” and are subject to change without notice. 5.0 Ordering Information For specific speeds, packages and powers, contact your sales office ...

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