AFBR-57J5APZ Avago Technologies US Inc., AFBR-57J5APZ Datasheet - Page 3

• Manufacturer Part Number: AFBR-57J5APZ
• Description: TXRX OPT SFP DGTL 850NM IND
• Manufacturer: Avago Technologies US Inc.
• Series: -r

Specifications of AFBR-57J5APZ

• Wavelength: 850nm
• Data Rate: 3.072Gbps
• Applications: General Purpose
• Voltage - Supply: 2.97 V ~ 3.63 V
• Connector Type: LC Duplex
• Mounting Type: SFP
• Product: Transceiver
• Maximum Rise Time: 0.1 ns/0.2 ns
• Maximum Fall Time: 0.1 ns/0.2 ns
• Pulse Width Distortion: 0.08 ns (Max)/0.065 ns (Max)
• Operating Supply Voltage: 2.97 V to 3.63 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: SFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Receiver Loss of Signal (Rx_LOS)
The post-amplification IC also includes transition
detection circuitry which monitors the ac level of
incoming optical signals and provides a TTL/CMOS com-
patible status signal to the host (pin 8). An adequate
optical input results in a low Rx_LOS output while a high
Rx_LOS output indicates an unusable optical input. The
Rx_LOS thresholds are factory set so that a high output
indicates a definite optical fault has occurred. Rx_LOS
can also be monitored via the two-wire serial interface
(address A2h, byte 110, bit 1).
Functional Data I/O
The AFBR-57J5APZ interfaces with the host circuit board
through twenty I/O pins (SFP electrical connector) iden-
tified by function in Table 2. The board layout for this
interface is depicted in Figure 6.
The AFBR-57J5APZ high speed transmit and receive in-
terfaces require SFP MSA, OBSAI or CPRI compliant signal
lines on the host board. To simplify board requirements,
biasing resistors and ac coupling capacitors are incorpo-
rated into the SFP transceiver module (per INF-8074) and
hence are not required on the host board. The Tx_Disable,
Tx_Fault, Rx_LOS and Rate_Select lines require TTL lines
on the host board (per INF-8074) if used. If an application
chooses not to take advantage of the functionality of
these pins care must be taken to ground Tx_Disable (for
normal operation) and Rate_Select is set to default in the
proper state.
Figure 2 depicts the recommended interface circuit to
link the AFBR-57J5APZ to supporting physical layer ICs.
Timing for MSA compliant control signals implemented
in the transceiver are listed in Figure 4.
Application Support
An Evaluation Kit and Reference Designs are available to
assist in evaluation of the AFBR-57J5APZ . Please contact
your local Field Sales representative for availability and
ordering details.
Caution
There are no user serviceable parts nor maintenance re-
quirements for the AFBR-57J5APZ. All mechanical ad-
justments are made at the factory prior to shipment.
Tampering with, modifying, misusing or improperly
handling the AFBR-57J5APZ will void the product
warranty. It may also result in improper operation and
possibly overstress the laser source. Performance deg-
radation or device failure may result. Connection of the
AFBR-57J5APZ to a light source not compliant with these
specifications, operating above maximum operating
conditions or in a manner inconsistent with it’s design
and function may result in exposure to hazardous light
radiation and may constitute an act of modifying or man-
3
ufacturing a laser product. Persons performing such an
act are required by law to re-certify and re-identify the
laser product under the provisions of U.S. 21 CFR (Sub-
chapter J) and TUV.
Ordering Information
Please contact your local field sales engineer or one of
Avago Technologies franchised distributors for ordering
information. For technical information, please visit Avago
Technologies’ WEB page at www.Avago.com or contact
Avago Technologies Semiconductor Products Customer
Response Center at 1-800-235-0312.
related to SFF Committee documentation visit www.sff-
committee.org.
Regulatory Compliance
The AFBR-57J5APZ complies with all applicable laws
and regulations as detailed in Table 1. Certification level
is dependent on the overall configuration of the host
equipment. The transceiver performance is offered as a
figure of merit to assist the designer
Electrostatic Discharge (ESD)
The AFBR-57J5APZ is compatible with ESD levels found
in typical manufacturing and operating environments
as described in Table 1. In the normal handling and
operation of optical transceivers, ESD is of concern in two
circumstances.
The first case is during handling of the transceiver prior
to insertion into an SFP compliant cage. To protect the
device, it’s important to use normal ESD handling precau-
tions. These include using of grounded wrist straps, work-
benches and floor wherever a transceiver is handled.
The second case to consider is static discharges to the
exterior of the host equipment chassis after installation.
If the optical interface is exposed to the exterior of host
equipment cabinet, the transceiver may be subject to
system level ESD requirements.
Electromagnetic Interference (EMI)
Equipment incorporating gigabit transceivers is typically
subject to regulation by the FCC in the United States,
CENELEC EN55022 (CISPR 22) in Europe and VCCI
in Japan.
standards is detailed in Table 1. The metal housing and
shielded design of the AFBR-57J5APZ minimizes the EMI
challenge facing the equipment designer.
EMI Immunity (Susceptibility)
Due to its shielded design, the EMI immunity of the AFBR-
57J5APZ exceeds typical industry standards.
The AFBR-57J5APZ’s compliance to these
For information