AFCT-5962ATGZ Avago Technologies US Inc., AFCT-5962ATGZ Datasheet - Page 8

• Manufacturer Part Number: AFCT-5962ATGZ
• Description: TXRX OPT SM SONET OC3/SDH 2X10
• Manufacturer: Avago Technologies US Inc.
• Series: METRAKr

Specifications of AFCT-5962ATGZ

• Applications: General Purpose
• Data Rate: 155Mbps
• Wavelength: 1300nm
• Voltage - Supply: 3.1 V ~ 3.5 V
• Connector Type: LC Duplex
• Mounting Type: Through Hole
• Data Rate Max: 0.155Gbps
• Supply Voltage: 3.3V
• Wavelength Typ: 1300nm
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 6b. Recommended ac coupled interface circuit
The AFCT-5962TLZ/TGZ/ATLZ/ATGZ/NLZ/NGZ
have a transmit disable function which is a
single-ended +3.3 V TTL input which is dc-
coupled to pin 13. In addition these devices offer
the designer the option of monitoring the laser
diode bias current and the laser diode optical
power. The voltage measured between pins 17
and 18 is proportional to the bias current through
an internal 10 Ω resistor. Similarly the optical
power rear facet monitor circuit provides a photo
current which is proportional
measured between pins 19 and 20, this voltage is
measured across an internal 200 Ω resistor.
As for the receiver section, it is internally ac-
coupled between the preamplifier and the
postamplifier stages. The actual Data and Data-
bar outputs of the postamplifier are dc-coupled
to their respective output pins (9, 10). The two
data outputs of the receiver should be terminated
with identical load circuits.
Signal Detect is a single-ended, +3.3 V PECL
compatible output signal that is dc-coupled to pin
8 of the module. Signal Detect should not be ac-
8
T
B
P
P
V
B
Note: C1 = C2 = C3 = 10 nF or 100 nF
Note A: CIRCUIT ASSUMES OPEN EMITTER OUTPUT
Note B: WHEN INTERNAL BIAS IS PROVIDED REPLACE SPLIT RESISTORS WITH 100 Ω TERMINATION
Note C: THE BIAS RESISTOR FOR VpdR SHOULD NOT EXCEED 200 Ω
* C4 AND C5 ARE OPTIONAL BYPASS CAPACITORS FOR ADDITIONAL LOW FREQUENCY NOISE FILTERING.
T
R
DIS
CC
MON
MON
MON
MON
X
X
RX (+3.3 V)
(LVTTL)
NOTE C
+
-
+
-
200 Ω
20 19 18 17 16 15 14 13 12 11
1
2
3
10 nF
4
5
6
7
8
9 10
to the voltage
V
130 Ω
82 Ω
CC
130 Ω
(+3.3 V)
82 Ω
130 Ω
130 Ω
C2
C1
100 nF
1 µH
1 µH
100 nF
100 nF
100 nF
100 nF
C5 *
10 µF
C4 *
10 µF
coupled externally to the follow-on circuits because
of its infrequent state changes.
The designer also has the option of monitoring
the PIN photo detector bias current. Figure 6b
shows a resistor network, which could be used to
do this. Note that the photo detector bias current
pin must be connected to V
also recommends that a decoupling capacitor is
used on this pin.
Power Supply Filtering and Ground Planes
It is important to exercise care in circuit board
layout to achieve optimum performance from these
transceivers. Figures 6a and 6b show the power
supply circuit which complies with the small form
factor multisource agreement. It is further
recommended that a continuous ground plane be
provided in the circuit board directly under the
transceiver to provide a low inductance ground
for signal return current. This recommendation is
in keeping with good high frequency board layout
practices.
Z = 50 Ω
Z = 50 Ω
Z = 50 Ω
Z = 50 Ω
Z = 50 Ω
V
CC
C3
(+3.3 V)
100 nF
100 nF
10 µF
130 ΩW
82 Ω
130 Ω
V
130 Ω
CC
82 Ω
(+3.3 V)
V
CC
130 Ω
82 Ω
(+3.3 V)
RD+
TD-
TD+
RD-
SD
130
Ω
CC
. Avago Technologies
LVPECL
V
CC
V
(+3.3 V)
CC
(+3.3 V)
NOTE A
NOTE B