HI5731-EVS Intersil, HI5731-EVS Datasheet - Page 10

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HI5731-EVS

Manufacturer Part Number
HI5731-EVS
Description
EVALUATION PLATFORM SOIC HI5731
Manufacturer
Intersil
Datasheets

Specifications of HI5731-EVS

Number Of Dac's
1
Number Of Bits
12
Outputs And Type
1, Differential
Sampling Rate (per Second)
100M
Data Interface
Parallel
Settling Time
20ns
Dac Type
Current
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
HI5731
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
HI5731 as possible on the analog (AV
supplies. The analog and digital ground returns should be
connected together back at the device to ensure proper
operation on power up. The V
decoupled with a 0.1µF capacitor.
Reference
The internal reference of the HI5731 is a -1.23V (typical)
bandgap voltage reference with 175µV/
drift (typical). The internal reference is connected to the
Control Amplifier which in turn drives the segmented current
cells. Reference Out (REF OUT) is internally connected to
the Control Amplifier. The Control Amplifier Output (CTRL
OUT) should be used to drive the Control Amplifier Input
(CTRL IN) and a 0.1µF capacitor to analog V
improves settling time by providing an AC ground at the
current source base node. The Full Scale Output Current is
controlled by the REF OUT pin and the set resistor (R
The ratio is:
I
The internal reference (REF OUT) can be overdriven with a
more precise external reference to provide better
performance over temperature. Figure 22 illustrates a typical
external reference configuration.
Multiplying Capability
The HI5731 can operate in two different multiplying
configurations. For frequencies from DC to 100kHz, a signal
of up to 0.6V
as shown in Figure 23.
The signal must have a DC value such that the peak
negative voltage equals -1.25V. Alternately, a capacitor can
be placed in series with REF OUT if DC multiplying is not
OUT
FIGURE 23. LOW FREQUENCY MULTIPLYING BANDWIDTH
FIGURE 22. EXTERNAL REFERENCE CONFIGURATION
(Full Scale) = (V
V
IN
P-P
CIRCUIT
(26) REF OUT
0.01µF
C
can be applied directly to the REF OUT pin
IN
HI5731
(OPTIONAL)
AV
REF OUT
EE
10
CC
/R
power pin should also be
SET
-5.2V
CTRL OUT
CTRL IN
REF OUT
RSET
EE
) x 16,
o
R
-1.25V
HI5731
) and digital (DV
C of temperature
EE
. This
SET
EE
).
)
HI5731
required. The lower input bandwidth can be calculated using
the following formula:
For multiplying frequencies above 100kHz, the CTRL IN pin
can be driven directly as seen in Figure 24.
The nominal input/output relationship is defined as:
In order to prevent the full scale output current from
exceeding 20.48mA, the R
according to the following equation:
The circuit in Figure 24 can be tuned to adjust the lower
cutoff frequency by adjusting capacitor values. Table 1 below
illustrates the relationship.
Also, the input signal must be limited to 1V
distortion in the DAC output current caused by excessive
modulation of the internal current sources.
Outputs
The outputs I
outputs. Current is steered to either I
proportion to the digital input code. The sum of the two
currents is always equal to the full scale current minus one
LSB. The current output can be converted to a voltage by
using a load resistor. Both current outputs should have the
same load resistor (64Ω typically). By using a 64Ω load on
the output, a 50Ω effective output resistance (R
achieved due to the 227Ω (±15%) parallel resistance seen
looking back into the output. This is the nominal value of the
R2R ladder of the DAC. The 50Ω output is needed for
matching the output with a 50Ω line. The load resistor should
C
∆I
R
FIGURE 24. HIGH FREQUENCY MULTIPLYING BANDWIDTH
IN
SET
OUT
100kHz
>1MHz
=
f
=
IN
------------------------------------------- .
(
=
2
---------------------------------------------------------------------------------------------- - .
I
π
V
OUT
∆V
------------- - .
80Ω
IN
) 1400
50Ω
(
IN
OUT
CIRCUIT
TABLE 1. CAPACITOR SELECTION
(FULL SCALE)
1
) f
(
200Ω
and I
C
IN
1
)
16V
0.001µF
OUT
0.01µF
REF
C1
C
SET
2
AV
are complementary current
EE
V
---------------------------- -
resistor must be adjusted
IN PEAK
80Ω
(
OUT
CTRL OUT
CTRL IN
)
HI5731
or I
P-P
OUT
0.1µF
to avoid
1µF
OUT
C2
in
) is

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