AD8036-EB Analog Devices Inc, AD8036-EB Datasheet - Page 16

• Manufacturer Part Number: AD8036-EB
• Description: BOARD EVAL FOR AD8036
• Manufacturer: Analog Devices Inc
• Series: CLAMPIN™r

Specifications of AD8036-EB

• Rohs Status: RoHS non-compliant
• Channels Per Ic: 1 - Single
• Amplifier Type: Voltage Feedback
• Output Type: Single-Ended
• Slew Rate: 1200 V/µs
• -3db Bandwidth: 240MHz
• Current - Output / Channel: 70mA
• Operating Temperature: -40°C ~ 85°C
• Current - Supply (main Ic): 20.5mA
• Voltage - Supply, Single/dual (±): ±3 V ~ 6 V
• Board Type: Fully Populated
• Utilized Ic / Part: AD8036

AD8036/AD8037
INPUT CLAMPING AMPLIFIER OPERATION
The key to the AD8036 and AD8037’s fast, accurate clamp and
amplifier performance is their unique patent pending CLAMPIN
input clamp architecture. This new design reduces clamp errors
by more than 10× over previous output clamp based circuits, as
well as substantially increasing the bandwidth, precision and
versatility of the clamp inputs.
Figure 6 is an idealized block diagram of the AD8036 connected
as a unity gain voltage follower. The primary signal path com-
prises A1 (a 1200 V/µs, 240 MHz high voltage gain, differential
to single-ended amplifier) and A2 (a G = +1 high current gain
output buffer). The AD8037 differs from the AD8036 only in
that A1 is optimized for closed-loop gains of two or greater.
The CLAMPIN section is comprised of comparators C
C
buffers in series with +V
pins from the comparators and S1 without reducing bandwidth
or precision.
The two comparators have about the same bandwidth as A1
(240 MHz), so they can keep up with signals within the useful
bandwidth of the AD8036. To illustrate the operation of the
CLAMPIN circuit, consider the case where V
1 V, V
necting its output back to its inverting input through the recom-
mended 140 Ω feedback resistor. Note that the main signal path
always operates closed loop, since the CLAMPIN circuit only
affects A1’s noninverting input.
If a 0 V to 2 V voltage ramp is applied to the AD8036’s +V
for the connection just described, V
perfectly up to 1 V, then should limit at exactly 1 V as +V
continues to 2 V.
In practice, the AD8036 comes close to this ideal behavior. As
the +V
high limit comparator C
put of C
practically by about 18 mV), C
from “A” to “B” reference level. Since the + input of A1 is now
connected to V
AD8036’s output voltage. In short, the AD8036 is now operat-
ing as a unity-gain buffer for the V
V
H
L
, which drive switch S1 through a decoder. The unity-gain
, for V
L
IN
40
30
20
10
is open, and the AD8036 is set for a gain of +1, by con-
L
input voltage ramps from zero to 1 V, the output of the
. When +V
H
0
> 1 V, will be faithfully reproduced at V
H
, further increases in +V
5
IN
just exceeds V
H
IN
starts in the off state, as does the out-
, V
10
H
, and V
C
H
L
– pF
changes state, switching S1
H
input, as any variation in
OUT
15
IN
L
inputs isolate the input
(ideally, by say 1 µV,
IN
should track +V
have no effect on the
H
20
is referenced to
OUT
.
H
25
and
IN
IN
IN
Operation of the AD8036 for negative input voltages and nega-
tive clamp levels on V
ling S1. Since the comparators see the voltage on the +V
as their common reference level, then the voltage V
defined as “High” or “Low” with respect to +V
if V
tor C
voltage on V
The performance of the AD8036 and AD8037 closely matches
the ideal just described. The comparator’s threshold extends
from 60 mV inside the clamp window defined by the voltages on
V
implemented with current steering, so that A1’s +input makes a
continuous transition from say, V
traverses the comparator’s input threshold from 0.9 V to 1.0 V
for V
The practical effect of these nonidealities is to soften the transition
from amplification to clamping modes, without compromising
the absolute clamp limit set by the CLAMPIN circuit. Figure 7
is a graph of V
clamp amplifier. Both amplifiers are set for G = +1 and V
The worst case error between V
(actual) is typically 18 mV times the amplifier closed-loop gain.
This occurs when V
and/or below this limit, V
ideal value.
In contrast, the output clamp amplifier’s transfer curve typically
will show some compression starting at an input of 0.8 V, and
can have an output voltage as far as 200 mV over the clamp limit.
In addition, since the output clamp in effect causes the am-
plifier to operate open loop in clamp mode, the amplifier’s out-
put impedance will increase, potentially causing additional errors.
The AD8036’s and AD8037’s CLAMPIN input clamp architec-
ture works only for noninverting or follower applications and,
since it operates on the input, the clamp voltage levels V
V
–V
+V
L
L
, and input error limits will be multiplied by the amplifier’s
V
V
and V
IN
IN
IN
H
L
H
L
is set to zero volts, V
will switch S1 to “C,” so the AD8036 will buffer the
= 1.0 V.
H
+1
+1
+1
to 60 mV beyond the window’s edge. Switch S1 is
L
and ignore +V
OUT
vs. V
IN
C
C
L
H
L
equals V
is similar, with comparator C
IN
B
OUT
C
for the AD8036 and a typical output
A
H
is open, and V
IN
will settle to within 5 mV of the
140
.
S1
R
OUT
H
F
IN
(or V
V
V
V
to V
(ideally clamped) and V
IN
L
IN
≤ V
A1
> V
< V
S1
L
IN
H
). As V
H
L
≤ V
as the input voltage
L
H
is +1 V, compara-
A2
+1
A B C
0 1 0
1 0 0
0 0 1
IN
IN
. For example,
goes above
H
L
and V
control-
H
H
IN
= 1 V.
and
V
pin
L
OUT
OUT
are