EVK1060A Atmel, EVK1060A Datasheet - Page 23

• Manufacturer Part Number: EVK1060A
• Description: KIT EVAL FOR AT42QT1060-MMU
• Manufacturer: Atmel
• Series: Quantum, QTouch™r

Specifications of EVK1060A

• Sensor Type: Touch, Capacitive
• Sensing Range: 1 Button/Key
• Interface: I²C
• Sensitivity: 2mm ~ 5mm Pad Widths
• Voltage - Supply: 3V
• Embedded: No
• Utilized Ic / Part: AT42QT1060
• Silicon Manufacturer: Atmel
• Silicon Core Number: AT42QT1060-MMU
• Kit Application Type: Sensing - Touch / Proximity
• Application Sub Type: Capacitive Touch
• Silicon Family Name: QT1060
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.19
6.20
6.21
6.22
9505E–AT42–02/09
Address 29: User Output Buffer
Address 30: Detection Integrator
Address 31: PWM Level
Address 40 – 51: Key Signal
Table 6-19.
Table 6-20.
Table 6-21.
Table 6-22.
IO0 – 6 (User Output Buffer): these bits control the output level for the IO's that are configured
as outputs. A
inactive. See
Default: 0 (all IO's inactive)
DETECTION INTEGRATOR: this 8-bit value controls the number of consecutive measurements
that must be confirmed as having passed the key threshold before that key is registered as
being in detect. A value of zero should not be used.
Default: 3
PWM LEVEL: this 8-bit value controls the duty cycle of the PWM output signal. A value of 255
means the output is permanently active.
Default: 128 (50:50 duty cycle)
KEY SIGNAL: addresses 40 – 51 allow key signals to be read for each key, starting with key 0.
There are two bytes of data for each key. These are the key’s 16-bit key signals which are
accessed as two 8-bit bytes, stored LSB first. These addresses are read-only.
Address
Address
Address
Address
42 – 51
29
30
31
40
41
Reserved
Section 6.24 on page 24
User Output Buffer
Detection Integrator
PWM Level
Key Signal
1
MSB
MSB
b7
b7
b7
b7
means the output generates an active output, a 0 means that the output is
IO6
b6
b6
b6
b6
LSB/MSB OF KEY SIGNAL FOR KEYS 1 – 5
IO5
b5
b5
b5
b5
MSB OF KEY SIGNAL FOR KEY 0
LSB OF KEY SIGNAL FOR KEY 0
for I/O register precedence and example usage.
DETECTION INTEGRATOR
IO4
b4
b4
b4
b4
PWM LEVEL
IO3
b3
b3
b3
b3
IO2
b2
b2
b2
b2
AT42QT1060
IO1
b1
b1
b1
b1
LSB
LSB
IO0
b0
b0
b0
b0
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