DK-35TS-LPC2478 Future Designs Inc, DK-35TS-LPC2478 Datasheet - Page 43

• Manufacturer Part Number: DK-35TS-LPC2478
• Description: PROGRAMMERS, DEVELOPMENT SYSTEMS
• Manufacturer: Future Designs Inc

Specifications of DK-35TS-LPC2478

• Sensor Type: Touch Screen
• Interface: I²C
• Voltage - Supply: 5V
• Embedded: Yes, MCU, 16/32-Bit
• Utilized Ic / Part: LPC2478 ARM7
• For Use With: 568-4742 - MODULE DIMM LPC2478 ARM7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Sensitivity: -
• Sensing Range: -
• Other names: 622-1034; ARM-35TS-LPC2478

NXP Semiconductors
LPC2478
Product data sheet
7.24.1 Features
7.24 Watchdog timer
7.25 RTC and battery RAM
The purpose of the watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the watchdog within a predetermined
amount of time.
The RTC is a set of counters for measuring time when system power is on, and optionally
when power is off. It uses little power in Power-down and Deep power-down modes. On
the LPC2478, the RTC can be clocked by a separate 32.768 kHz oscillator or by a
programmable prescale divider based on the APB clock. Also, the RTC is powered by its
own power supply pin, VBAT, which can be connected to a battery or to the same 3.3 V
supply used by the rest of the device.
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Pulse period and width can be any number of timer counts. This allows complete
flexibility in the trade-off between resolution and repetition rate. All PWM outputs will
occur at the same repetition rate.
Double edge controlled PWM outputs can be programmed to be either positive going
or negative going pulses.
Match register updates are synchronized with pulse outputs to prevent generation of
erroneous pulses. Software must ‘release’ new match values before they can become
effective.
May be used as a standard timer if the PWM mode is not enabled.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 32-bit timer with internal prescaler.
Selectable time period from (T
multiples of T
The Watchdog Clock (WDCLK) source can be selected from the RTC clock, the
Internal RC oscillator (IRC), or the APB peripheral clock. This gives a wide range of
potential timing choices of Watchdog operation under different power reduction
conditions. It also provides the ability to run the WDT from an entirely internal source
that is not dependent on an external crystal and its associated components and
wiring, for increased reliability.
All information provided in this document is subject to legal disclaimers.
cy(WDCLK)
Rev. 2 — 29 September 2010
× 4.
cy(WDCLK)
× 256 × 4) to (T
Single-chip 16-bit/32-bit microcontroller
cy(WDCLK)
× 2
LPC2478
© NXP B.V. 2010. All rights reserved.
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