DK-N2EVAL-3C25N Altera, DK-N2EVAL-3C25N Datasheet - Page 38

• Manufacturer Part Number: DK-N2EVAL-3C25N
• Description: KIT DEV NIOS II CYCLONE III ED.
• Manufacturer: Altera
• Series: Cyclone® IIIr
• Type: FPGAr

Specifications of DK-N2EVAL-3C25N

• Contents: Development Board, Module, and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Silicon Core Number: EP3C
• Silicon Family Name: Cyclone III
• Rohs Compliant: Yes
• For Use With/related Products: EP3C25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2411; DK-N2EVAL-3C25N-OB; DK-NIOSEVAL-3C25N; NEEK

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2
MAX II CPLD Features
Devices
An external resistor must be used for a 5-V tolerance.
36
Typical equivalent macrocells.
Altera Product Catalog
Equivalent macrocells
Pin-to-pin delay (ns)
User flash memory (Kb)
Boundary scan JTAG
JTAG ISP
Fast input registers
Programmable register
power up
JTAG translator
Real-time ISP
MultiVolt I/Os (V)
I/O power banks
Maximum output enables
LVTTL/LVCMOS
32-bit, 66-MHz PCI compliant
Schmitt triggers
Programmable slew rate
Programmable pull-up resistors
Programmable ground pins
Open-drain outputs
Bus hold
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1
2011
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www.altera.com
1.5, 1.8, 2.5, 3.3
EPM240/Z
4.7, 7.5
192
80
2
-
1.5, 1.8, 2.5, 3.3
EPM570/Z
MAX II CPLDs (3.3 V, 2.5 V, 1.8 V)
5.4, 9.0
440
160
2
-
3
3
3
3
3
3
3
3
3
3
3
3
3
8
1.5, 1.8, 2.5, 3.3, 5.0
EPM1270
980
212
6.2
3
4
2
2
1.5, 1.8, 2.5, 3.3, 5.0
EPM2210
1,700
272
7.0
3
4
2
2