Z86L9800ZEM Zilog, Z86L9800ZEM Datasheet - Page 11

• Manufacturer Part Number: Z86L9800ZEM
• Description: Z86L98 ICEBOX
• Manufacturer: Zilog
• Series: ICEBOX™r
• Type: In-Circuit Emulator Systemr

Specifications of Z86L9800ZEM

• Contents: Emulator Board, Cables, Software and Documentation
• For Use With/related Products: Z86x IR Microcontroller Families
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PS002603-0108
Note:
Caution:
The emulator must not be started with an OTP device or Adapter in the programming
socket, because the emulator might not start-up correctly.
10. Power supply ramp-up/rise time must be set so that when the minimum power-on
11. If the Program Counter jumps to an unknown address:
12. If the Program keeps resetting:
13. The bits of non-implemented features for devices having PC ON register must be set
14. When interrupts are enabled, setting a breakpoint after a Halt instruction, breaks the
15. SCLK/16 Mode of SMR register is not supported.
16. The OTP activity bar is not proportionate to the address being processed.
A shorted PLCC or DIP OTP can crash the emulator when inserted into the OTP pro-
gramming socket. If a PLCC part is inserted and causes a temporary short, then the part
loses its functions. An attempt to perform BLANK CHECK on such a part causes the
hour-glass to appear continuously. The Windows application must be reset and restarted.
same values in the general-purpose registers, while the real device has random or
undefined values.
reset time (Toper) expires, the V
(a) Stack is not set to internal. Register %F8(P01M Reg) bit D2 are not set to
(b) The Stack Pointer Register %FE(SPH) and Register %FF(SPL) are not initial-
(c) An instruction other than DI was used to disable interrupts.
(d) The Stack overflowed into the general-purpose register locations.
(e) When making changes to the IMR register, GLOBAL interrupts must be dis-
(a) Program Counter rolled over from value FFFF to 0000 and proceeded back to
(b) Watch-Dog Timer (WDT) was not refreshed from devices with the WDT fea-
to State1 on the emulator.
emulator at the first instruction in the interrupt service routine that is serviced when
an IRQ occurs.
State1.
ized. For the internal Stack, SPH does not have to be initialized because it is not
used. The SPH and SPL are reset to 00H after any reset or Stop-Mode Recov-
ery.
abled before using a DI instruction.
the beginning of program.
ture.
CC
is in the specified operating range of the device.
Product Specification
Z86L98ZEM
7