ESDA6V1-5T6 STMicroelectronics, ESDA6V1-5T6 Datasheet

TRANSIL ARRAY ESD 5CH 6UDFN

ESDA6V1-5T6

Manufacturer Part Number
ESDA6V1-5T6
Description
TRANSIL ARRAY ESD 5CH 6UDFN
Manufacturer
STMicroelectronics
Series
TRANSIL™r
Datasheets

Specifications of ESDA6V1-5T6

Voltage - Reverse Standoff (typ)
3V
Voltage - Breakdown
6.1V
Power (watts)
35W
Polarization
5 Channel Array - Unidirectional
Mounting Type
Surface Mount
Package / Case
6-UDFN
Polarity
Unidirectional
Channels
5 Channels
Breakdown Voltage
6.1 V
Termination Style
SMD/SMT
Peak Surge Current
3 A
Peak Pulse Power Dissipation
35 W
Capacitance
34 pF
Dimensions
1.05 mm W x 1.05 mm L x 0.4 mm H
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10415-2

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Manufacturer
Quantity
Price
Part Number:
ESDA6V1-5T6
Manufacturer:
ST
0
Features
Complies with the following standards
Applications
Where transient overvoltage protection in ESD
sensitive equipment is required, such as:
Description
The ESDA6V1-5T6 is monolithic arrays designed
to protect up to 5 lines against ESD transients.
The device is ideal for applications where both
reduced print circuit board space and high ESD
protection level are required.
March 2011
5 unidirectional Transil diodes
Breakdown voltage V
Low leakage current < 200 nA
Very small PCB area: 1.0 mm²
350 µm pitch micro-package
Lead-free and RoHS package
High ESD protection level
High integration
Suitable for high density boards
IEC 61000-4-2 level 4:
– 15 kV (air discharge)
– 8 kV (contact discharge)
MIL STD 883G- Method 3015-7: class 3B:
– HBM (human body model)
Cellular phone handsets and accessories
Computers
Printers
Communication systems
Video equipment
Set top boxes
BR
= 6.1 V min.
Doc ID 16855 Rev 2
Transil™ arrays for ESD protection
Figure 1.
TM: Transil is a trademark of STMicroelectronics
Functional diagram (top view)
Micro DFN package
1.0 x 1.0-6L
ESDA6V1-5T6
www.st.com
1/11
11

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ESDA6V1-5T6 Summary of contents

Page 1

... Communication systems ■ Video equipment ■ Set top boxes Description The ESDA6V1-5T6 is monolithic arrays designed to protect lines against ESD transients. The device is ideal for applications where both reduced print circuit board space and high ESD protection level are required. March 2011 Transil™ ...

Page 2

... Symbol V = Breakdown voltage Leakage current @ Stand-off voltage RM Table 2. Electrical characteristics (values, T Symbol DC 2/11 amb Parameter (1) Parameter RM Test conditions = 1 MHz rms osc osc Doc ID 16855 Rev 2 ESDA6V1-5T6 = 25 °C) Value initial = amb 3 125 -55 + 150 260 Slope: 1 °C) amb Min. Typ. Max. 6.1 34 Unit ° ...

Page 3

... ESDA6V1-5T6 Figure 3. Relative variation of peak pulse power versus initial junction temperature P (W) PP 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 Figure 5. Clamping voltage versus peak pulse current (typical values, exponential waveform) I (A) PP 10.0 Wave 8/20 µ °C 1.0 ...

Page 4

... F(Hz) -140.00 100.0M 1.0G Figure 12. ESD response to IEC 61000-4-2 5 V/Div C2 C2 100 ns/Div Doc ID 16855 Rev 2 ESDA6V1-5T6 between channels dB 100.0k 1.0M 10.0M 100.0M 1.0G (-15 kV air discharge) on each channel 100 ns/Div ESDA 6V1 5T6 F(Hz) ...

Page 5

... ESDA6V1-5T6 3 Package information ● Epoxy meets UL94, V0 ● Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. Table 3. ...

Page 6

... Figure 16. Tape and reel specifications Dot identifying Pin 1 location 0.23 ± 0.02 0.53± 0.05 All dimensions in mm 6/11 2.0 ± 0.05 4.0 ± 0 1.13 ± 0.05 User direction of unreeling Doc ID 16855 Rev 2 ESDA6V1-5T6 Ø 1.50 + 0.10 / -0.00 J 2.0 ± 0.05 ...

Page 7

... ESDA6V1-5T6 4 Recommendation on PCB assembly 4.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 17. Stencil opening dimensions b) General design rule Stencil thickness ( 125 µm Aspect Ratio Aspect Area 2. Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for leads: Opening to footprint ratio is 100% ...

Page 8

... To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 8/11 Doc ID 16855 Rev 2 ESDA6V1-5T6 ...

Page 9

... ESDA6V1-5T6 4.5 Reflow profile Figure 19. ST ECOPACK Temperature (°C) Temperature (°C) 260°C max 260°C max 255°C 255°C 220°C 220°C 180°C 180°C 125 °C 125 ° Note: Minimize air convection currents in the reflow oven to avoid component movement. ...

Page 10

... The marking can be rotated by multiples of 90° to differentiate assembly location 6 Revision history Table 5. Document revision history Date 21-Jan-2010 03-Mar-2011 10/11 Marking Package (1) DFN1.0 x1.0-6L J Revision 1 Initial release. 2 Added Figure 15 and following note. Added footnote to Doc ID 16855 Rev 2 ESDA6V1-5T6 Weight Base qty Delivery mode 1.78 mg 3000 Tape and reel Changes Table 4. ...

Page 11

... ESDA6V1-5T6 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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