PIC16F677-I/P Microchip Technology, PIC16F677-I/P Datasheet - Page 42
![IC PIC MCU FLASH 2KX14 20DIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC16F677-I/P
Manufacturer Part Number
PIC16F677-I/P
Description
IC PIC MCU FLASH 2KX14 20DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
5.PIC16F677-ISO.pdf
(294 pages)
Specifications of PIC16F677-I/P
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
20-DIP (0.300", 7.62mm)
Mfg Application Notes
Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162061 - HEADER INTRFC MPLAB ICD2 20PINACICE0203 - MPLABICE 20P 300 MIL ADAPTER
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F677-I/P
Manufacturer:
MICROCHIP
Quantity:
2 000
- PIC16F616T-ISL PDF datasheet
- PIC16F690DM-PCTLHS PDF datasheet #2
- PIC16F677-IP PDF datasheet #3
- PIC16F677-IP PDF datasheet #4
- PIC16F677-ISO PDF datasheet #5
- Current page: 42 of 294
- Download datasheet (6Mb)
PIC16F631/677/685/687/689/690
2.2.2.5
The PIE2 register contains the interrupt enable bits, as
shown in Register 2-5.
REGISTER 2-5:
DS41262C-page 40
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
OSFIE
R/W-0
PIE2 Register
OSFIE: Oscillator Fail Interrupt Enable bit
1 = Enables oscillator fail interrupt
0 = Disables oscillator fail interrupt
C2IE: Comparator C2 Interrupt Enable bit
1 = Enables Comparator C2 interrupt
0 = Disables Comparator C2 interrupt
C1IE: Comparator C1 Interrupt Enable bit
1 = Enables Comparator C1 interrupt
0 = Disables Comparator C1 interrupt
EEIE: EE Write Operation Interrupt Enable bit
1 = Enables write operation interrupt
0 = Disables write operation interrupt
Unimplemented: Read as ‘0’
R/W-0
C2IE
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
W = Writable bit
‘1’ = Bit is set
R/W-0
C1IE
R/W-0
EEIE
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
Note:
Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
U-0
—
© 2006 Microchip Technology Inc.
x = Bit is unknown
U-0
—
U-0
—
bit 0
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